Loading drivers/gpu/drm/i915/i915_gem.c +4 −6 Original line number Diff line number Diff line Loading @@ -1219,11 +1219,11 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) ret = i915_gem_object_bind_to_gtt(obj, 0, true); if (ret) goto unlock; } ret = i915_gem_object_set_to_gtt_domain(obj, write); if (ret) goto unlock; } if (obj->tiling_mode == I915_TILING_NONE) ret = i915_gem_object_put_fence(obj); Loading Loading @@ -2926,8 +2926,6 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj) */ wmb(); i915_gem_release_mmap(obj); old_write_domain = obj->base.write_domain; obj->base.write_domain = 0; Loading drivers/gpu/drm/i915/i915_gem_execbuffer.c +0 −4 Original line number Diff line number Diff line Loading @@ -187,10 +187,6 @@ i915_gem_object_set_to_gpu_domain(struct drm_i915_gem_object *obj, if ((flush_domains | invalidate_domains) & I915_GEM_DOMAIN_CPU) i915_gem_clflush_object(obj); /* blow away mappings if mapped through GTT */ if ((flush_domains | invalidate_domains) & I915_GEM_DOMAIN_GTT) i915_gem_release_mmap(obj); if (obj->base.pending_write_domain) cd->flips |= atomic_read(&obj->pending_flip); Loading drivers/gpu/drm/i915/i915_irq.c +1 −0 Original line number Diff line number Diff line Loading @@ -1749,6 +1749,7 @@ void ironlake_irq_preinstall(struct drm_device *dev) * happens. */ I915_WRITE(GEN6_BLITTER_HWSTAM, ~GEN6_BLITTER_USER_INTERRUPT); I915_WRITE(GEN6_BSD_HWSTAM, ~GEN6_BSD_USER_INTERRUPT); } /* XXX hotplug from PCH */ Loading drivers/gpu/drm/i915/i915_reg.h +1 −0 Original line number Diff line number Diff line Loading @@ -531,6 +531,7 @@ #define GEN6_BSD_SLEEP_PSMI_CONTROL_RC_ILDL_MESSAGE_ENABLE 0 #define GEN6_BSD_SLEEP_PSMI_CONTROL_IDLE_INDICATOR (1 << 3) #define GEN6_BSD_HWSTAM 0x12098 #define GEN6_BSD_IMR 0x120a8 #define GEN6_BSD_USER_INTERRUPT (1 << 12) Loading drivers/gpu/drm/i915/i915_suspend.c +5 −0 Original line number Diff line number Diff line Loading @@ -678,6 +678,7 @@ void i915_save_display(struct drm_device *dev) } /* VGA state */ mutex_lock(&dev->struct_mutex); dev_priv->saveVGA0 = I915_READ(VGA0); dev_priv->saveVGA1 = I915_READ(VGA1); dev_priv->saveVGA_PD = I915_READ(VGA_PD); Loading @@ -687,6 +688,7 @@ void i915_save_display(struct drm_device *dev) dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); i915_save_vga(dev); mutex_unlock(&dev->struct_mutex); } void i915_restore_display(struct drm_device *dev) Loading Loading @@ -780,6 +782,8 @@ void i915_restore_display(struct drm_device *dev) I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL); else I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); mutex_lock(&dev->struct_mutex); I915_WRITE(VGA0, dev_priv->saveVGA0); I915_WRITE(VGA1, dev_priv->saveVGA1); I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); Loading @@ -787,6 +791,7 @@ void i915_restore_display(struct drm_device *dev) udelay(150); i915_restore_vga(dev); mutex_unlock(&dev->struct_mutex); } int i915_save_state(struct drm_device *dev) Loading Loading
drivers/gpu/drm/i915/i915_gem.c +4 −6 Original line number Diff line number Diff line Loading @@ -1219,11 +1219,11 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) ret = i915_gem_object_bind_to_gtt(obj, 0, true); if (ret) goto unlock; } ret = i915_gem_object_set_to_gtt_domain(obj, write); if (ret) goto unlock; } if (obj->tiling_mode == I915_TILING_NONE) ret = i915_gem_object_put_fence(obj); Loading Loading @@ -2926,8 +2926,6 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj) */ wmb(); i915_gem_release_mmap(obj); old_write_domain = obj->base.write_domain; obj->base.write_domain = 0; Loading
drivers/gpu/drm/i915/i915_gem_execbuffer.c +0 −4 Original line number Diff line number Diff line Loading @@ -187,10 +187,6 @@ i915_gem_object_set_to_gpu_domain(struct drm_i915_gem_object *obj, if ((flush_domains | invalidate_domains) & I915_GEM_DOMAIN_CPU) i915_gem_clflush_object(obj); /* blow away mappings if mapped through GTT */ if ((flush_domains | invalidate_domains) & I915_GEM_DOMAIN_GTT) i915_gem_release_mmap(obj); if (obj->base.pending_write_domain) cd->flips |= atomic_read(&obj->pending_flip); Loading
drivers/gpu/drm/i915/i915_irq.c +1 −0 Original line number Diff line number Diff line Loading @@ -1749,6 +1749,7 @@ void ironlake_irq_preinstall(struct drm_device *dev) * happens. */ I915_WRITE(GEN6_BLITTER_HWSTAM, ~GEN6_BLITTER_USER_INTERRUPT); I915_WRITE(GEN6_BSD_HWSTAM, ~GEN6_BSD_USER_INTERRUPT); } /* XXX hotplug from PCH */ Loading
drivers/gpu/drm/i915/i915_reg.h +1 −0 Original line number Diff line number Diff line Loading @@ -531,6 +531,7 @@ #define GEN6_BSD_SLEEP_PSMI_CONTROL_RC_ILDL_MESSAGE_ENABLE 0 #define GEN6_BSD_SLEEP_PSMI_CONTROL_IDLE_INDICATOR (1 << 3) #define GEN6_BSD_HWSTAM 0x12098 #define GEN6_BSD_IMR 0x120a8 #define GEN6_BSD_USER_INTERRUPT (1 << 12) Loading
drivers/gpu/drm/i915/i915_suspend.c +5 −0 Original line number Diff line number Diff line Loading @@ -678,6 +678,7 @@ void i915_save_display(struct drm_device *dev) } /* VGA state */ mutex_lock(&dev->struct_mutex); dev_priv->saveVGA0 = I915_READ(VGA0); dev_priv->saveVGA1 = I915_READ(VGA1); dev_priv->saveVGA_PD = I915_READ(VGA_PD); Loading @@ -687,6 +688,7 @@ void i915_save_display(struct drm_device *dev) dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); i915_save_vga(dev); mutex_unlock(&dev->struct_mutex); } void i915_restore_display(struct drm_device *dev) Loading Loading @@ -780,6 +782,8 @@ void i915_restore_display(struct drm_device *dev) I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL); else I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); mutex_lock(&dev->struct_mutex); I915_WRITE(VGA0, dev_priv->saveVGA0); I915_WRITE(VGA1, dev_priv->saveVGA1); I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); Loading @@ -787,6 +791,7 @@ void i915_restore_display(struct drm_device *dev) udelay(150); i915_restore_vga(dev); mutex_unlock(&dev->struct_mutex); } int i915_save_state(struct drm_device *dev) Loading