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Commit dac1558d authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/fb: create tag heap from common code for all relevant chipsets



A nv2x bug wrt hardcoded tag counts is now also fixed as a side-effect.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 268d5a30
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+1 −0
Original line number Diff line number Diff line
@@ -64,6 +64,7 @@ nouveau-y += core/subdev/devinit/nv50.o
nouveau-y += core/subdev/fb/base.o
nouveau-y += core/subdev/fb/nv04.o
nouveau-y += core/subdev/fb/nv10.o
nouveau-y += core/subdev/fb/nv1a.o
nouveau-y += core/subdev/fb/nv20.o
nouveau-y += core/subdev/fb/nv25.o
nouveau-y += core/subdev/fb/nv30.o
+11 −1
Original line number Diff line number Diff line
@@ -71,6 +71,7 @@ struct nouveau_fb {
		u64 size;
		int ranks;

		int  (*init)(struct nouveau_fb *);
		int  (*get)(struct nouveau_fb *, u64 size, u32 align,
			    u32 size_nc, u32 type, struct nouveau_mem **);
		void (*put)(struct nouveau_fb *, struct nouveau_mem **);
@@ -101,7 +102,7 @@ nouveau_fb(void *obj)

#define nouveau_fb_create(p,e,c,d)                                             \
	nouveau_subdev_create((p), (e), (c), 0, "PFB", "fb", (d))
int  nouveau_fb_created(struct nouveau_fb *);
int  nouveau_fb_preinit(struct nouveau_fb *);
void nouveau_fb_destroy(struct nouveau_fb *);
int  nouveau_fb_init(struct nouveau_fb *);
#define nouveau_fb_fini(p,s)                                                   \
@@ -113,6 +114,7 @@ int _nouveau_fb_init(struct nouveau_object *);

extern struct nouveau_oclass nv04_fb_oclass;
extern struct nouveau_oclass nv10_fb_oclass;
extern struct nouveau_oclass nv1a_fb_oclass;
extern struct nouveau_oclass nv20_fb_oclass;
extern struct nouveau_oclass nv25_fb_oclass;
extern struct nouveau_oclass nv30_fb_oclass;
@@ -132,6 +134,12 @@ int nouveau_fb_bios_memtype(struct nouveau_bios *);

bool nv04_fb_memtype_valid(struct nouveau_fb *, u32 memtype);

void nv10_fb_tile_init(struct nouveau_fb *, int i, u32 addr, u32 size,
		       u32 pitch, u32 flags, struct nouveau_fb_tile *);
void nv10_fb_tile_fini(struct nouveau_fb *, int i, struct nouveau_fb_tile *);
void nv10_fb_tile_prog(struct nouveau_fb *, int, struct nouveau_fb_tile *);

int  nv20_fb_vram_init(struct nouveau_fb *);
void nv20_fb_tile_init(struct nouveau_fb *, int i, u32 addr, u32 size,
		       u32 pitch, u32 flags, struct nouveau_fb_tile *);
void nv20_fb_tile_fini(struct nouveau_fb *, int i, struct nouveau_fb_tile *);
@@ -142,9 +150,11 @@ void nv30_fb_tile_init(struct nouveau_fb *, int i, u32 addr, u32 size,
		       u32 pitch, u32 flags, struct nouveau_fb_tile *);
void nv30_fb_tile_fini(struct nouveau_fb *, int i, struct nouveau_fb_tile *);

int  nv41_fb_vram_init(struct nouveau_fb *);
int  nv41_fb_init(struct nouveau_object *);
void nv41_fb_tile_prog(struct nouveau_fb *, int, struct nouveau_fb_tile *);

int  nv44_fb_vram_init(struct nouveau_fb *);
int  nv44_fb_init(struct nouveau_object *);
void nv44_fb_tile_prog(struct nouveau_fb *, int, struct nouveau_fb_tile *);

+2 −2
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ nv10_identify(struct nouveau_device *device)
		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] = &nv10_fb_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] = &nv1a_fb_oclass;
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -159,7 +159,7 @@ nv10_identify(struct nouveau_device *device)
		device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
		device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] = &nv10_fb_oclass;
		device->oclass[NVDEV_SUBDEV_FB     ] = &nv1a_fb_oclass;
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
+49 −35
Original line number Diff line number Diff line
@@ -57,25 +57,45 @@ nouveau_fb_bios_memtype(struct nouveau_bios *bios)
}

int
nouveau_fb_init(struct nouveau_fb *pfb)
nouveau_fb_preinit(struct nouveau_fb *pfb)
{
	int ret, i;
	static const char *name[] = {
		[NV_MEM_TYPE_UNKNOWN] = "unknown",
		[NV_MEM_TYPE_STOLEN ] = "stolen system memory",
		[NV_MEM_TYPE_SGRAM  ] = "SGRAM",
		[NV_MEM_TYPE_SDRAM  ] = "SDRAM",
		[NV_MEM_TYPE_DDR1   ] = "DDR1",
		[NV_MEM_TYPE_DDR2   ] = "DDR2",
		[NV_MEM_TYPE_DDR3   ] = "DDR3",
		[NV_MEM_TYPE_GDDR2  ] = "GDDR2",
		[NV_MEM_TYPE_GDDR3  ] = "GDDR3",
		[NV_MEM_TYPE_GDDR4  ] = "GDDR4",
		[NV_MEM_TYPE_GDDR5  ] = "GDDR5",
	};
	int ret, tags;

	ret = nouveau_subdev_init(&pfb->base);
	tags = pfb->ram.init(pfb);
	if (tags < 0 || !pfb->ram.size) {
		nv_fatal(pfb, "error detecting memory configuration!!\n");
		return (tags < 0) ? tags : -ERANGE;
	}

	if (!nouveau_mm_initialised(&pfb->vram)) {
		ret = nouveau_mm_init(&pfb->vram, 0, pfb->ram.size >> 12, 1);
		if (ret)
			return ret;
	}

	for (i = 0; i < pfb->tile.regions; i++)
		pfb->tile.prog(pfb, i, &pfb->tile.region[i]);

	return 0;
	if (!nouveau_mm_initialised(&pfb->tags) && tags) {
		ret = nouveau_mm_init(&pfb->tags, 0, ++tags, 1);
		if (ret)
			return ret;
	}

int
_nouveau_fb_init(struct nouveau_object *object)
{
	struct nouveau_fb *pfb = (void *)object;
	return nouveau_fb_init(pfb);
	nv_info(pfb, "RAM type: %s\n", name[pfb->ram.type]);
	nv_info(pfb, "RAM size: %d MiB\n", (int)(pfb->ram.size >> 20));
	nv_info(pfb, "   ZCOMP: %d tags\n", tags);
	return 0;
}

void
@@ -97,30 +117,24 @@ _nouveau_fb_dtor(struct nouveau_object *object)
	struct nouveau_fb *pfb = (void *)object;
	nouveau_fb_destroy(pfb);
}

int
nouveau_fb_created(struct nouveau_fb *pfb)
nouveau_fb_init(struct nouveau_fb *pfb)
{
	static const char *name[] = {
		[NV_MEM_TYPE_UNKNOWN] = "unknown",
		[NV_MEM_TYPE_STOLEN ] = "stolen system memory",
		[NV_MEM_TYPE_SGRAM  ] = "SGRAM",
		[NV_MEM_TYPE_SDRAM  ] = "SDRAM",
		[NV_MEM_TYPE_DDR1   ] = "DDR1",
		[NV_MEM_TYPE_DDR2   ] = "DDR2",
		[NV_MEM_TYPE_DDR3   ] = "DDR3",
		[NV_MEM_TYPE_GDDR2  ] = "GDDR2",
		[NV_MEM_TYPE_GDDR3  ] = "GDDR3",
		[NV_MEM_TYPE_GDDR4  ] = "GDDR4",
		[NV_MEM_TYPE_GDDR5  ] = "GDDR5",
	};
	int ret, i;

	if (pfb->ram.size == 0) {
		nv_fatal(pfb, "no vram detected!!\n");
		return -ERANGE;
	}
	ret = nouveau_subdev_init(&pfb->base);
	if (ret)
		return ret;

	for (i = 0; i < pfb->tile.regions; i++)
		pfb->tile.prog(pfb, i, &pfb->tile.region[i]);

	nv_info(pfb, "RAM type: %s\n", name[pfb->ram.type]);
	nv_info(pfb, "RAM size: %d MiB\n", (int)(pfb->ram.size >> 20));
	return 0;
}

int
_nouveau_fb_init(struct nouveau_object *object)
{
	struct nouveau_fb *pfb = (void *)object;
	return nouveau_fb_init(pfb);
}
+33 −29
Original line number Diff line number Diff line
@@ -55,6 +55,37 @@ nv04_fb_memtype_valid(struct nouveau_fb *pfb, u32 tile_flags)
	return false;
}

static int
nv04_fb_vram_init(struct nouveau_fb *pfb)
{
	u32 boot0 = nv_rd32(pfb, NV04_PFB_BOOT_0);
	if (boot0 & 0x00000100) {
		pfb->ram.size  = ((boot0 >> 12) & 0xf) * 2 + 2;
		pfb->ram.size *= 1024 * 1024;
	} else {
		switch (boot0 & NV04_PFB_BOOT_0_RAM_AMOUNT) {
		case NV04_PFB_BOOT_0_RAM_AMOUNT_32MB:
			pfb->ram.size = 32 * 1024 * 1024;
			break;
		case NV04_PFB_BOOT_0_RAM_AMOUNT_16MB:
			pfb->ram.size = 16 * 1024 * 1024;
			break;
		case NV04_PFB_BOOT_0_RAM_AMOUNT_8MB:
			pfb->ram.size = 8 * 1024 * 1024;
			break;
		case NV04_PFB_BOOT_0_RAM_AMOUNT_4MB:
			pfb->ram.size = 4 * 1024 * 1024;
			break;
		}
	}

	if ((boot0 & 0x00000038) <= 0x10)
		pfb->ram.type = NV_MEM_TYPE_SGRAM;
	else
		pfb->ram.type = NV_MEM_TYPE_SDRAM;
	return 0;
}

static int
nv04_fb_init(struct nouveau_object *object)
{
@@ -79,7 +110,6 @@ nv04_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
	     struct nouveau_object **pobject)
{
	struct nv04_fb_priv *priv;
	u32 boot0;
	int ret;

	ret = nouveau_fb_create(parent, engine, oclass, &priv);
@@ -87,35 +117,9 @@ nv04_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
	if (ret)
		return ret;

	boot0 = nv_rd32(priv, NV04_PFB_BOOT_0);
	if (boot0 & 0x00000100) {
		priv->base.ram.size  = ((boot0 >> 12) & 0xf) * 2 + 2;
		priv->base.ram.size *= 1024 * 1024;
	} else {
		switch (boot0 & NV04_PFB_BOOT_0_RAM_AMOUNT) {
		case NV04_PFB_BOOT_0_RAM_AMOUNT_32MB:
			priv->base.ram.size = 32 * 1024 * 1024;
			break;
		case NV04_PFB_BOOT_0_RAM_AMOUNT_16MB:
			priv->base.ram.size = 16 * 1024 * 1024;
			break;
		case NV04_PFB_BOOT_0_RAM_AMOUNT_8MB:
			priv->base.ram.size = 8 * 1024 * 1024;
			break;
		case NV04_PFB_BOOT_0_RAM_AMOUNT_4MB:
			priv->base.ram.size = 4 * 1024 * 1024;
			break;
		}
	}

	if ((boot0 & 0x00000038) <= 0x10)
		priv->base.ram.type = NV_MEM_TYPE_SGRAM;
	else
		priv->base.ram.type = NV_MEM_TYPE_SDRAM;


	priv->base.memtype_valid = nv04_fb_memtype_valid;
	return nouveau_fb_created(&priv->base);
	priv->base.ram.init = nv04_fb_vram_init;
	return nouveau_fb_preinit(&priv->base);
}

struct nouveau_oclass
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