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Commit da1016a5 authored by Will Deacon's avatar Will Deacon Committed by Greg Kroah-Hartman
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UPSTREAM: arm64: tls: Avoid unconditional zeroing of tpidrro_el0 for native tasks 



When unmapping the kernel at EL0, we use tpidrro_el0 as a scratch register
during exception entry from native tasks and subsequently zero it in
the kernel_ventry macro. We can therefore avoid zeroing tpidrro_el0
in the context-switch path for native tasks using the entry trampoline.

Reviewed-by: default avatarMark Rutland <mark.rutland@arm.com>
Tested-by: default avatarLaura Abbott <labbott@redhat.com>
Tested-by: default avatarShanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
(cherry picked from commit 18011eac28c7cb31c87b86b7d0e5b01894405c7f)

[toddpoynor@google.com: fixup context]
Change-Id: I4a0ded2e339b0c75521bc3b5a7fbbb3e60aa8774
Signed-off-by: default avatarTodd Poynor <toddpoynor@google.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
parent 04b77fe9

arch/arm64/kernel/process.c

+6 −6
Original line number Diff line number Diff line
@@ -372,17 +372,17 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start, 


static void tls_thread_switch(struct task_struct *next)

{

	unsigned long tpidr, tpidrro;

	unsigned long tpidr;



	tpidr = read_sysreg(tpidr_el0);

	*task_user_tls(current) = tpidr;



	tpidr = *task_user_tls(next);

	tpidrro = is_compat_thread(task_thread_info(next)) ?

		  next->thread.tp_value : 0;

	if (is_compat_thread(task_thread_info(next)))

		write_sysreg(next->thread.tp_value, tpidrro_el0);

	else if (!arm64_kernel_unmapped_at_el0())

		write_sysreg(0, tpidrro_el0);



	write_sysreg(tpidr, tpidr_el0);

	write_sysreg(tpidrro, tpidrro_el0);

	write_sysreg(*task_user_tls(next), tpidr_el0);

}



/* Restore the UAO state depending on next's addr_limit */