Loading drivers/gpu/drm/msm/dp/dp_aux.c +11 −2 Original line number Diff line number Diff line Loading @@ -107,6 +107,7 @@ static u32 dp_aux_write(struct dp_aux_private *aux, } aux->catalog->clear_trans(aux->catalog, false); aux->catalog->clear_hw_interrupts(aux->catalog); reg = 0; /* Transaction number == 1 */ if (!aux->native) { /* i2c */ Loading Loading @@ -203,6 +204,10 @@ static void dp_aux_native_handler(struct dp_aux_private *aux) aux->aux_error_num = DP_AUX_ERR_TOUT; if (isr & DP_INTR_NACK_DEFER) aux->aux_error_num = DP_AUX_ERR_NACK; if (isr & DP_INTR_AUX_ERROR) { aux->aux_error_num = DP_AUX_ERR_PHY; aux->catalog->clear_hw_interrupts(aux->catalog); } complete(&aux->comp); } Loading @@ -227,6 +232,10 @@ static void dp_aux_i2c_handler(struct dp_aux_private *aux) aux->aux_error_num = DP_AUX_ERR_NACK; if (isr & DP_INTR_I2C_DEFER) aux->aux_error_num = DP_AUX_ERR_DEFER; if (isr & DP_INTR_AUX_ERROR) { aux->aux_error_num = DP_AUX_ERR_PHY; aux->catalog->clear_hw_interrupts(aux->catalog); } } complete(&aux->comp); Loading Loading @@ -454,11 +463,11 @@ static void dp_aux_init(struct dp_aux *dp_aux, struct dp_aux_cfg *aux_cfg) aux = container_of(dp_aux, struct dp_aux_private, dp_aux); dp_aux_reset_phy_config_indices(aux_cfg); aux->catalog->setup(aux->catalog, aux_cfg); aux->catalog->reset(aux->catalog); aux->catalog->enable(aux->catalog, true); aux->retry_cnt = 0; dp_aux_reset_phy_config_indices(aux_cfg); aux->catalog->setup(aux->catalog, aux_cfg); } static void dp_aux_deinit(struct dp_aux *dp_aux) Loading drivers/gpu/drm/msm/dp/dp_aux.h +1 −0 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ enum dp_aux_error { DP_AUX_ERR_NACK = -3, DP_AUX_ERR_DEFER = -4, DP_AUX_ERR_NACK_DEFER = -5, DP_AUX_ERR_PHY = -6, }; struct dp_aux { Loading drivers/gpu/drm/msm/dp/dp_catalog.c +32 −3 Original line number Diff line number Diff line Loading @@ -158,6 +158,31 @@ static int dp_catalog_aux_clear_trans(struct dp_catalog_aux *aux, bool read) return rc; } static void dp_catalog_aux_clear_hw_interrupts(struct dp_catalog_aux *aux) { struct dp_catalog_private *catalog; void __iomem *phy_base; u32 data = 0; if (!aux) { pr_err("invalid input\n"); return; } dp_catalog_get_priv(aux); phy_base = catalog->io->phy_io.base; data = dp_read(phy_base + DP_PHY_AUX_INTERRUPT_STATUS); pr_debug("PHY_AUX_INTERRUPT_STATUS=0x%08x\n", data); dp_write(phy_base + DP_PHY_AUX_INTERRUPT_CLEAR, 0x1f); wmb(); /* make sure 0x1f is written before next write */ dp_write(phy_base + DP_PHY_AUX_INTERRUPT_CLEAR, 0x9f); wmb(); /* make sure 0x9f is written before next write */ dp_write(phy_base + DP_PHY_AUX_INTERRUPT_CLEAR, 0); wmb(); /* make sure register is cleared */ } static void dp_catalog_aux_reset(struct dp_catalog_aux *aux) { u32 aux_ctrl; Loading @@ -180,6 +205,7 @@ static void dp_catalog_aux_reset(struct dp_catalog_aux *aux) aux_ctrl &= ~BIT(1); dp_write(base + DP_AUX_CTRL, aux_ctrl); wmb(); /* make sure AUX reset is done here */ } static void dp_catalog_aux_enable(struct dp_catalog_aux *aux, bool enable) Loading @@ -199,15 +225,16 @@ static void dp_catalog_aux_enable(struct dp_catalog_aux *aux, bool enable) aux_ctrl = dp_read(base + DP_AUX_CTRL); if (enable) { aux_ctrl |= BIT(0); dp_write(base + DP_AUX_CTRL, aux_ctrl); wmb(); /* make sure AUX module is enabled */ dp_write(base + DP_TIMEOUT_COUNT, 0xffff); dp_write(base + DP_AUX_LIMITS, 0xffff); aux_ctrl |= BIT(0); } else { aux_ctrl &= ~BIT(0); } dp_write(base + DP_AUX_CTRL, aux_ctrl); } } static void dp_catalog_aux_update_cfg(struct dp_catalog_aux *aux, struct dp_aux_cfg *cfg, enum dp_phy_aux_config_type type) Loading Loading @@ -263,6 +290,7 @@ static void dp_catalog_aux_setup(struct dp_catalog_aux *aux, } dp_write(catalog->io->phy_io.base + DP_PHY_AUX_INTERRUPT_MASK, 0x1F); wmb(); /* make sure AUX configuration is done before enabling it */ } static void dp_catalog_aux_get_irq(struct dp_catalog_aux *aux, bool cmd_busy) Loading Loading @@ -1242,6 +1270,7 @@ struct dp_catalog *dp_catalog_get(struct device *dev, struct dp_io *io) .enable = dp_catalog_aux_enable, .setup = dp_catalog_aux_setup, .get_irq = dp_catalog_aux_get_irq, .clear_hw_interrupts = dp_catalog_aux_clear_hw_interrupts, }; struct dp_catalog_ctrl ctrl = { .state_ctrl = dp_catalog_ctrl_state_ctrl, Loading drivers/gpu/drm/msm/dp/dp_catalog.h +1 −0 Original line number Diff line number Diff line Loading @@ -75,6 +75,7 @@ struct dp_catalog_aux { void (*setup)(struct dp_catalog_aux *aux, struct dp_aux_cfg *aux_cfg); void (*get_irq)(struct dp_catalog_aux *aux, bool cmd_busy); void (*clear_hw_interrupts)(struct dp_catalog_aux *aux); }; struct dp_catalog_ctrl { Loading drivers/gpu/drm/msm/dp/dp_reg.h +1 −0 Original line number Diff line number Diff line Loading @@ -179,6 +179,7 @@ #define DP_PHY_AUX_CFG9 (0x00000044) #define DP_PHY_AUX_INTERRUPT_MASK (0x00000048) #define DP_PHY_AUX_INTERRUPT_CLEAR (0x0000004C) #define DP_PHY_AUX_INTERRUPT_STATUS (0x000000BC) #define DP_PHY_SPARE0 (0x00AC) Loading Loading
drivers/gpu/drm/msm/dp/dp_aux.c +11 −2 Original line number Diff line number Diff line Loading @@ -107,6 +107,7 @@ static u32 dp_aux_write(struct dp_aux_private *aux, } aux->catalog->clear_trans(aux->catalog, false); aux->catalog->clear_hw_interrupts(aux->catalog); reg = 0; /* Transaction number == 1 */ if (!aux->native) { /* i2c */ Loading Loading @@ -203,6 +204,10 @@ static void dp_aux_native_handler(struct dp_aux_private *aux) aux->aux_error_num = DP_AUX_ERR_TOUT; if (isr & DP_INTR_NACK_DEFER) aux->aux_error_num = DP_AUX_ERR_NACK; if (isr & DP_INTR_AUX_ERROR) { aux->aux_error_num = DP_AUX_ERR_PHY; aux->catalog->clear_hw_interrupts(aux->catalog); } complete(&aux->comp); } Loading @@ -227,6 +232,10 @@ static void dp_aux_i2c_handler(struct dp_aux_private *aux) aux->aux_error_num = DP_AUX_ERR_NACK; if (isr & DP_INTR_I2C_DEFER) aux->aux_error_num = DP_AUX_ERR_DEFER; if (isr & DP_INTR_AUX_ERROR) { aux->aux_error_num = DP_AUX_ERR_PHY; aux->catalog->clear_hw_interrupts(aux->catalog); } } complete(&aux->comp); Loading Loading @@ -454,11 +463,11 @@ static void dp_aux_init(struct dp_aux *dp_aux, struct dp_aux_cfg *aux_cfg) aux = container_of(dp_aux, struct dp_aux_private, dp_aux); dp_aux_reset_phy_config_indices(aux_cfg); aux->catalog->setup(aux->catalog, aux_cfg); aux->catalog->reset(aux->catalog); aux->catalog->enable(aux->catalog, true); aux->retry_cnt = 0; dp_aux_reset_phy_config_indices(aux_cfg); aux->catalog->setup(aux->catalog, aux_cfg); } static void dp_aux_deinit(struct dp_aux *dp_aux) Loading
drivers/gpu/drm/msm/dp/dp_aux.h +1 −0 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ enum dp_aux_error { DP_AUX_ERR_NACK = -3, DP_AUX_ERR_DEFER = -4, DP_AUX_ERR_NACK_DEFER = -5, DP_AUX_ERR_PHY = -6, }; struct dp_aux { Loading
drivers/gpu/drm/msm/dp/dp_catalog.c +32 −3 Original line number Diff line number Diff line Loading @@ -158,6 +158,31 @@ static int dp_catalog_aux_clear_trans(struct dp_catalog_aux *aux, bool read) return rc; } static void dp_catalog_aux_clear_hw_interrupts(struct dp_catalog_aux *aux) { struct dp_catalog_private *catalog; void __iomem *phy_base; u32 data = 0; if (!aux) { pr_err("invalid input\n"); return; } dp_catalog_get_priv(aux); phy_base = catalog->io->phy_io.base; data = dp_read(phy_base + DP_PHY_AUX_INTERRUPT_STATUS); pr_debug("PHY_AUX_INTERRUPT_STATUS=0x%08x\n", data); dp_write(phy_base + DP_PHY_AUX_INTERRUPT_CLEAR, 0x1f); wmb(); /* make sure 0x1f is written before next write */ dp_write(phy_base + DP_PHY_AUX_INTERRUPT_CLEAR, 0x9f); wmb(); /* make sure 0x9f is written before next write */ dp_write(phy_base + DP_PHY_AUX_INTERRUPT_CLEAR, 0); wmb(); /* make sure register is cleared */ } static void dp_catalog_aux_reset(struct dp_catalog_aux *aux) { u32 aux_ctrl; Loading @@ -180,6 +205,7 @@ static void dp_catalog_aux_reset(struct dp_catalog_aux *aux) aux_ctrl &= ~BIT(1); dp_write(base + DP_AUX_CTRL, aux_ctrl); wmb(); /* make sure AUX reset is done here */ } static void dp_catalog_aux_enable(struct dp_catalog_aux *aux, bool enable) Loading @@ -199,15 +225,16 @@ static void dp_catalog_aux_enable(struct dp_catalog_aux *aux, bool enable) aux_ctrl = dp_read(base + DP_AUX_CTRL); if (enable) { aux_ctrl |= BIT(0); dp_write(base + DP_AUX_CTRL, aux_ctrl); wmb(); /* make sure AUX module is enabled */ dp_write(base + DP_TIMEOUT_COUNT, 0xffff); dp_write(base + DP_AUX_LIMITS, 0xffff); aux_ctrl |= BIT(0); } else { aux_ctrl &= ~BIT(0); } dp_write(base + DP_AUX_CTRL, aux_ctrl); } } static void dp_catalog_aux_update_cfg(struct dp_catalog_aux *aux, struct dp_aux_cfg *cfg, enum dp_phy_aux_config_type type) Loading Loading @@ -263,6 +290,7 @@ static void dp_catalog_aux_setup(struct dp_catalog_aux *aux, } dp_write(catalog->io->phy_io.base + DP_PHY_AUX_INTERRUPT_MASK, 0x1F); wmb(); /* make sure AUX configuration is done before enabling it */ } static void dp_catalog_aux_get_irq(struct dp_catalog_aux *aux, bool cmd_busy) Loading Loading @@ -1242,6 +1270,7 @@ struct dp_catalog *dp_catalog_get(struct device *dev, struct dp_io *io) .enable = dp_catalog_aux_enable, .setup = dp_catalog_aux_setup, .get_irq = dp_catalog_aux_get_irq, .clear_hw_interrupts = dp_catalog_aux_clear_hw_interrupts, }; struct dp_catalog_ctrl ctrl = { .state_ctrl = dp_catalog_ctrl_state_ctrl, Loading
drivers/gpu/drm/msm/dp/dp_catalog.h +1 −0 Original line number Diff line number Diff line Loading @@ -75,6 +75,7 @@ struct dp_catalog_aux { void (*setup)(struct dp_catalog_aux *aux, struct dp_aux_cfg *aux_cfg); void (*get_irq)(struct dp_catalog_aux *aux, bool cmd_busy); void (*clear_hw_interrupts)(struct dp_catalog_aux *aux); }; struct dp_catalog_ctrl { Loading
drivers/gpu/drm/msm/dp/dp_reg.h +1 −0 Original line number Diff line number Diff line Loading @@ -179,6 +179,7 @@ #define DP_PHY_AUX_CFG9 (0x00000044) #define DP_PHY_AUX_INTERRUPT_MASK (0x00000048) #define DP_PHY_AUX_INTERRUPT_CLEAR (0x0000004C) #define DP_PHY_AUX_INTERRUPT_STATUS (0x000000BC) #define DP_PHY_SPARE0 (0x00AC) Loading