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Commit d87d0c93 authored by Ralf Baechle's avatar Ralf Baechle
Browse files

[MIPS] SMTC: Microoptimize atomic_postincrement for non-weak consistency. 



Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 61a33168

arch/mips/kernel/smtc.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -713,7 +713,7 @@ static __inline__ int atomic_postincrement(unsigned int *pv) 
	"	addu	%1, %0, 1				\n"

	"	addu	%1, %0, 1				\n"

	"	sc	%1, %2					\n"

	"	sc	%1, %2					\n"

	"	beqz	%1, 1b					\n"

	"	beqz	%1, 1b					\n"

	"	sync						\n"

	__WEAK_LLSC_MB

	: "=&r" (result), "=&r" (temp), "=m" (*pv)

	: "=&r" (result), "=&r" (temp), "=m" (*pv)

	: "m" (*pv)

	: "m" (*pv)

	: "memory");

	: "memory");