Merge branch 'topic/asoc' into for-linus (d71f4cec) · Commits · e / devices / android_kernel_fairphone_FP3

arch/arm/mach-davinci/board-dm365-evm.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -605,7 +605,11 @@ static __init void dm365_evm_init(void)
		/* maybe setup mmc1/etc ... _after_ mmc0 */
		evm_init_cpld();

		#ifdef CONFIG_SND_DM365_AIC3X_CODEC
		dm365_init_asp(&dm365_evm_snd_data);
		#elif defined(CONFIG_SND_DM365_VOICE_CODEC)
		dm365_init_vc(&dm365_evm_snd_data);
		#endif
		dm365_init_rtc();
		dm365_init_ks(&dm365evm_ks_data);

arch/arm/mach-omap2/mcbsp.c

+4 −8

Original line number	Diff line number	Diff line
		@@ -187,32 +187,28 @@ static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
		.phys_base = OMAP44XX_MCBSP1_BASE,
		.dma_rx_sync = OMAP44XX_DMA_MCBSP1_RX,
		.dma_tx_sync = OMAP44XX_DMA_MCBSP1_TX,
		.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
		.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
		.tx_irq = OMAP44XX_IRQ_MCBSP1,
		.ops = &omap2_mcbsp_ops,
		},
		{
		.phys_base = OMAP44XX_MCBSP2_BASE,
		.dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX,
		.dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX,
		.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
		.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
		.tx_irq = OMAP44XX_IRQ_MCBSP2,
		.ops = &omap2_mcbsp_ops,
		},
		{
		.phys_base = OMAP44XX_MCBSP3_BASE,
		.dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX,
		.dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX,
		.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
		.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
		.tx_irq = OMAP44XX_IRQ_MCBSP3,
		.ops = &omap2_mcbsp_ops,
		},
		{
		.phys_base = OMAP44XX_MCBSP4_BASE,
		.dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX,
		.dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX,
		.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
		.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
		.tx_irq = OMAP44XX_IRQ_MCBSP4,
		.ops = &omap2_mcbsp_ops,
		},
		};

arch/arm/mach-s3c2412/dma.c

+0 −3

Original line number	Diff line number	Diff line
		@@ -30,7 +30,6 @@
		#include <mach/regs-mem.h>
		#include <mach/regs-lcd.h>
		#include <mach/regs-sdi.h>
		#include <plat/regs-s3c2412-iis.h>
		#include <plat/regs-iis.h>
		#include <plat/regs-spi.h>

		@@ -119,13 +118,11 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
		.name = "i2s-sdi",
		.channels = MAP(S3C2412_DMAREQSEL_I2SRX),
		.channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
		.hw_addr.from = S3C2410_PA_IIS + S3C2412_IISRXD,
		},
		[DMACH_I2S_OUT] = {
		.name = "i2s-sdo",
		.channels = MAP(S3C2412_DMAREQSEL_I2STX),
		.channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
		.hw_addr.to = S3C2410_PA_IIS + S3C2412_IISTXD,
		},
		[DMACH_USB_EP1] = {
		.name = "usb-ep1",

arch/arm/plat-omap/include/plat/mcbsp.h

+6 −0

Original line number	Diff line number	Diff line
		@@ -149,6 +149,8 @@
		#define OMAP_MCBSP_REG_WAKEUPEN 0xA8
		#define OMAP_MCBSP_REG_XCCR 0xAC
		#define OMAP_MCBSP_REG_RCCR 0xB0
		#define OMAP_MCBSP_REG_XBUFFSTAT 0xB4
		#define OMAP_MCBSP_REG_RBUFFSTAT 0xB8
		#define OMAP_MCBSP_REG_SSELCR 0xBC

		#define OMAP_ST_REG_REV 0x00
		@@ -471,6 +473,8 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
		void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold);
		u16 omap_mcbsp_get_max_tx_threshold(unsigned int id);
		u16 omap_mcbsp_get_max_rx_threshold(unsigned int id);
		u16 omap_mcbsp_get_tx_delay(unsigned int id);
		u16 omap_mcbsp_get_rx_delay(unsigned int id);
		int omap_mcbsp_get_dma_op_mode(unsigned int id);
		#else
		static inline void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
		@@ -479,6 +483,8 @@ static inline void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
		{ }
		static inline u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) { return 0; }
		static inline u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) { return 0; }
		static inline u16 omap_mcbsp_get_tx_delay(unsigned int id) { return 0; }
		static inline u16 omap_mcbsp_get_rx_delay(unsigned int id) { return 0; }
		static inline int omap_mcbsp_get_dma_op_mode(unsigned int id) { return 0; }
		#endif
		int omap_mcbsp_request(unsigned int id);

arch/arm/plat-omap/mcbsp.c

+74 −15

Original line number	Diff line number	Diff line
		@@ -489,7 +489,7 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
		{
		struct omap_mcbsp *mcbsp;

		if (!cpu_is_omap34xx())
		if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
		return;

		if (!omap_mcbsp_check_valid_id(id)) {
		@@ -511,7 +511,7 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
		{
		struct omap_mcbsp *mcbsp;

		if (!cpu_is_omap34xx())
		if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
		return;

		if (!omap_mcbsp_check_valid_id(id)) {
		@@ -560,6 +560,61 @@ u16 omap_mcbsp_get_max_rx_threshold(unsigned int id)
		}
		EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold);

		#define MCBSP2_FIFO_SIZE 0x500 /* 1024 + 256 locations */
		#define MCBSP1345_FIFO_SIZE 0x80 /* 128 locations */
		/*
		* omap_mcbsp_get_tx_delay returns the number of used slots in the McBSP FIFO
		*/
		u16 omap_mcbsp_get_tx_delay(unsigned int id)
		{
		struct omap_mcbsp *mcbsp;
		u16 buffstat;

		if (!omap_mcbsp_check_valid_id(id)) {
		printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
		return -ENODEV;
		}
		mcbsp = id_to_mcbsp_ptr(id);

		/* Returns the number of free locations in the buffer */
		buffstat = MCBSP_READ(mcbsp, XBUFFSTAT);

		/* Number of slots are different in McBSP ports */
		if (mcbsp->id == 2)
		return MCBSP2_FIFO_SIZE - buffstat;
		else
		return MCBSP1345_FIFO_SIZE - buffstat;
		}
		EXPORT_SYMBOL(omap_mcbsp_get_tx_delay);

		/*
		* omap_mcbsp_get_rx_delay returns the number of free slots in the McBSP FIFO
		* to reach the threshold value (when the DMA will be triggered to read it)
		*/
		u16 omap_mcbsp_get_rx_delay(unsigned int id)
		{
		struct omap_mcbsp *mcbsp;
		u16 buffstat, threshold;

		if (!omap_mcbsp_check_valid_id(id)) {
		printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
		return -ENODEV;
		}
		mcbsp = id_to_mcbsp_ptr(id);

		/* Returns the number of used locations in the buffer */
		buffstat = MCBSP_READ(mcbsp, RBUFFSTAT);
		/* RX threshold */
		threshold = MCBSP_READ(mcbsp, THRSH1);

		/* Return the number of location till we reach the threshold limit */
		if (threshold <= buffstat)
		return 0;
		else
		return threshold - buffstat;
		}
		EXPORT_SYMBOL(omap_mcbsp_get_rx_delay);

		/*
		* omap_mcbsp_get_dma_op_mode just return the current configured
		* operating mode for the mcbsp channel
		@@ -587,7 +642,7 @@ static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
		* Enable wakup behavior, smart idle and all wakeups
		* REVISIT: some wakeups may be unnecessary
		*/
		if (cpu_is_omap34xx()) {
		if (cpu_is_omap34xx() \|\| cpu_is_omap44xx()) {
		u16 syscon;

		syscon = MCBSP_READ(mcbsp, SYSCON);
		@@ -610,7 +665,7 @@ static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
		/*
		* Disable wakup behavior, smart idle and all wakeups
		*/
		if (cpu_is_omap34xx()) {
		if (cpu_is_omap34xx() \|\| cpu_is_omap44xx()) {
		u16 syscon;

		syscon = MCBSP_READ(mcbsp, SYSCON);
		@@ -724,8 +779,10 @@ int omap_mcbsp_request(unsigned int id)
		goto err_clk_disable;
		}

		if (mcbsp->rx_irq) {
		init_completion(&mcbsp->rx_irq_completion);
		err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
		err = request_irq(mcbsp->rx_irq,
		omap_mcbsp_rx_irq_handler,
		0, "McBSP", (void *)mcbsp);
		if (err != 0) {
		dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
		@@ -734,6 +791,7 @@ int omap_mcbsp_request(unsigned int id)
		goto err_free_irq;
		}
		}
		}

		return 0;
		err_free_irq:
		@@ -781,6 +839,7 @@ void omap_mcbsp_free(unsigned int id)

		if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
		/* Free IRQs */
		if (mcbsp->rx_irq)
		free_irq(mcbsp->rx_irq, (void *)mcbsp);
		free_irq(mcbsp->tx_irq, (void *)mcbsp);
		}
		@@ -855,7 +914,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
		MCBSP_WRITE(mcbsp, SPCR2, w \| (1 << 7));
		}

		if (cpu_is_omap2430() \|\| cpu_is_omap34xx()) {
		if (cpu_is_omap2430() \|\| cpu_is_omap34xx() \|\| cpu_is_omap44xx()) {
		/* Release the transmitter and receiver */
		w = MCBSP_READ_CACHE(mcbsp, XCCR);
		w &= ~(tx ? XDISABLE : 0);
		@@ -885,7 +944,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)

		/* Reset transmitter */
		tx &= 1;
		if (cpu_is_omap2430() \|\| cpu_is_omap34xx()) {
		if (cpu_is_omap2430() \|\| cpu_is_omap34xx() \|\| cpu_is_omap44xx()) {
		w = MCBSP_READ_CACHE(mcbsp, XCCR);
		w \|= (tx ? XDISABLE : 0);
		MCBSP_WRITE(mcbsp, XCCR, w);
		@@ -895,7 +954,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)

		/* Reset receiver */
		rx &= 1;
		if (cpu_is_omap2430() \|\| cpu_is_omap34xx()) {
		if (cpu_is_omap2430() \|\| cpu_is_omap34xx() \|\| cpu_is_omap44xx()) {
		w = MCBSP_READ_CACHE(mcbsp, RCCR);
		w \|= (rx ? RDISABLE : 0);
		MCBSP_WRITE(mcbsp, RCCR, w);