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Commit d6542d76 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull arch/tile updates from Chris Metcalf:
 "This is an even quieter cycle than usual"

* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
  Fix typo
  Fix typo
  Fix typo
  tile: sort the "select" lines in the TILE/TILEGX configs
  tile: clarify barrier semantics of atomic_add_return
  tile/defconfigs: Remove CONFIG_IPV6_PRIVACY
parents 3ec438af bdf03e59
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+30 −41
Original line number Diff line number Diff line
@@ -3,49 +3,38 @@

config TILE
	def_bool y
	select HAVE_EXIT_THREAD
	select HAVE_PERF_EVENTS
	select USE_PMC if PERF_EVENTS
	select HAVE_DMA_API_DEBUG
	select HAVE_KVM if !TILEGX
	select GENERIC_FIND_FIRST_BIT
	select SYSCTL_EXCEPTION_TRACE
	select CC_OPTIMIZE_FOR_SIZE
	select HAVE_DEBUG_KMEMLEAK
	select GENERIC_IRQ_PROBE
	select GENERIC_PENDING_IRQ if SMP
	select GENERIC_IRQ_SHOW
	select HAVE_DEBUG_BUGVERBOSE
	select VIRT_TO_BUS
	select SYS_HYPERVISOR
	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
	select ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS
	select ARCH_HAS_DEVMEM_IS_ALLOWED
	select ARCH_HAVE_NMI_SAFE_CMPXCHG
	select GENERIC_CLOCKEVENTS
	select MODULES_USE_ELF_RELA
	select HAVE_ARCH_TRACEHOOK
	select HAVE_SYSCALL_TRACEPOINTS
	select USER_STACKTRACE_SUPPORT
	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
	select HAVE_DEBUG_STACKOVERFLOW
	select ARCH_WANT_FRAME_POINTERS
	select HAVE_CONTEXT_TRACKING
	select HAVE_NMI if USE_PMC
	select CC_OPTIMIZE_FOR_SIZE
	select EDAC_SUPPORT
	select GENERIC_CLOCKEVENTS
	select GENERIC_FIND_FIRST_BIT
	select GENERIC_IRQ_PROBE
	select GENERIC_IRQ_SHOW
	select GENERIC_PENDING_IRQ if SMP
	select GENERIC_STRNCPY_FROM_USER
	select GENERIC_STRNLEN_USER
	select HAVE_ARCH_SECCOMP_FILTER

# FIXME: investigate whether we need/want these options.
#	select HAVE_IOREMAP_PROT
#	select HAVE_OPTPROBES
#	select HAVE_REGS_AND_STACK_ACCESS_API
#	select HAVE_HW_BREAKPOINT
#	select PERF_EVENTS
#	select HAVE_USER_RETURN_NOTIFIER
#	config NO_BOOTMEM
#	config ARCH_SUPPORTS_DEBUG_PAGEALLOC
#	config HUGETLB_PAGE_SIZE_VARIABLE
	select HAVE_ARCH_TRACEHOOK
	select HAVE_CONTEXT_TRACKING
	select HAVE_DEBUG_BUGVERBOSE
	select HAVE_DEBUG_KMEMLEAK
	select HAVE_DEBUG_STACKOVERFLOW
	select HAVE_DMA_API_DEBUG
	select HAVE_EXIT_THREAD
	select HAVE_KVM if !TILEGX
	select HAVE_NMI if USE_PMC
	select HAVE_PERF_EVENTS
	select HAVE_SYSCALL_TRACEPOINTS
	select MODULES_USE_ELF_RELA
	select SYSCTL_EXCEPTION_TRACE
	select SYS_HYPERVISOR
	select USER_STACKTRACE_SUPPORT
	select USE_PMC if PERF_EVENTS
	select VIRT_TO_BUS

config MMU
	def_bool y
@@ -132,17 +121,17 @@ config HVC_TILE
# 64-bit TILE-Gx toolchain, so force CONFIG_TILEGX on.
config TILEGX
	def_bool ARCH != "tilepro"
	select SPARSE_IRQ
	select ARCH_SUPPORTS_ATOMIC_RMW
	select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
	select HAVE_FUNCTION_TRACER
	select HAVE_FUNCTION_GRAPH_TRACER
	select HAVE_ARCH_JUMP_LABEL
	select HAVE_ARCH_KGDB
	select HAVE_DYNAMIC_FTRACE
	select HAVE_FTRACE_MCOUNT_RECORD
	select HAVE_FUNCTION_GRAPH_TRACER
	select HAVE_FUNCTION_TRACER
	select HAVE_KPROBES
	select HAVE_KRETPROBES
	select HAVE_ARCH_KGDB
	select ARCH_SUPPORTS_ATOMIC_RMW
	select HAVE_ARCH_JUMP_LABEL
	select SPARSE_IRQ

config TILEPRO
	def_bool !TILEGX
+0 −1
Original line number Diff line number Diff line
@@ -89,7 +89,6 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_CONG_ILLINOIS=m
CONFIG_TCP_MD5SIG=y
CONFIG_IPV6=y
CONFIG_IPV6_PRIVACY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
+0 −1
Original line number Diff line number Diff line
@@ -85,7 +85,6 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_CONG_ILLINOIS=m
CONFIG_TCP_MD5SIG=y
CONFIG_IPV6=y
CONFIG_IPV6_PRIVACY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
+1 −1
Original line number Diff line number Diff line
@@ -122,7 +122,7 @@ size_t gxio_mpipe_calc_buffer_stack_bytes(unsigned long buffers)
{
	const int BUFFERS_PER_LINE = 12;

	/* Count the number of cachlines. */
	/* Count the number of cachelines. */
	unsigned long lines =
		(buffers + BUFFERS_PER_LINE - 1) / BUFFERS_PER_LINE;

+15 −2
Original line number Diff line number Diff line
@@ -37,12 +37,25 @@ static inline void atomic_add(int i, atomic_t *v)
	__insn_fetchadd4((void *)&v->counter, i);
}

/*
 * Note a subtlety of the locking here.  We are required to provide a
 * full memory barrier before and after the operation.  However, we
 * only provide an explicit mb before the operation.  After the
 * operation, we use barrier() to get a full mb for free, because:
 *
 * (1) The barrier directive to the compiler prohibits any instructions
 * being statically hoisted before the barrier;
 * (2) the microarchitecture will not issue any further instructions
 * until the fetchadd result is available for the "+ i" add instruction;
 * (3) the smb_mb before the fetchadd ensures that no other memory
 * operations are in flight at this point.
 */
static inline int atomic_add_return(int i, atomic_t *v)
{
	int val;
	smp_mb();  /* barrier for proper semantics */
	val = __insn_fetchadd4((void *)&v->counter, i) + i;
	barrier();  /* the "+ i" above will wait on memory */
	barrier();  /* equivalent to smp_mb(); see block comment above */
	return val;
}

@@ -95,7 +108,7 @@ static inline long atomic64_add_return(long i, atomic64_t *v)
	int val;
	smp_mb();  /* barrier for proper semantics */
	val = __insn_fetchadd((void *)&v->counter, i) + i;
	barrier();  /* the "+ i" above will wait on memory */
	barrier();  /* equivalent to smp_mb; see atomic_add_return() */
	return val;
}

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