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Commit d63955b3 authored by Michal Kazior's avatar Michal Kazior Committed by Kalle Valo
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ath10k: add support for qca6174



The QCA6174 in combination with new wmi-tlv firmware is capable of
multi-channel, beamforming, tdls and other features.

This patch just makes it possible to boot these devices and do some basic stuff
like connect to an AP without encryption. Some things may not work or may be
unreliable. New features will be implemented later. This will be addressed
eventually with future patches.

Signed-off-by: default avatarMichal Kazior <michal.kazior@tieto.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent 3ec79e3a
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+2 −1
Original line number Original line Diff line number Diff line
@@ -9,7 +9,8 @@ ath10k_core-y += mac.o \
		 txrx.o \
		 txrx.o \
		 wmi.o \
		 wmi.o \
		 wmi-tlv.o \
		 wmi-tlv.o \
		 bmi.o
		 bmi.o \
		 hw.o


ath10k_core-$(CONFIG_ATH10K_DEBUGFS) += spectral.o
ath10k_core-$(CONFIG_ATH10K_DEBUGFS) += spectral.o
ath10k_core-$(CONFIG_NL80211_TESTMODE) += testmode.o
ath10k_core-$(CONFIG_NL80211_TESTMODE) += testmode.o
+6 −6
Original line number Original line Diff line number Diff line
@@ -803,7 +803,7 @@ int ath10k_ce_disable_interrupts(struct ath10k *ar)
	int ce_id;
	int ce_id;


	for (ce_id = 0; ce_id < CE_COUNT; ce_id++) {
	for (ce_id = 0; ce_id < CE_COUNT; ce_id++) {
		u32 ctrl_addr = ath10k_ce_base_address(ce_id);
		u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id);


		ath10k_ce_copy_complete_intr_disable(ar, ctrl_addr);
		ath10k_ce_copy_complete_intr_disable(ar, ctrl_addr);
		ath10k_ce_error_intr_disable(ar, ctrl_addr);
		ath10k_ce_error_intr_disable(ar, ctrl_addr);
@@ -832,7 +832,7 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar,
	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
	struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id];
	struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id];
	struct ath10k_ce_ring *src_ring = ce_state->src_ring;
	struct ath10k_ce_ring *src_ring = ce_state->src_ring;
	u32 nentries, ctrl_addr = ath10k_ce_base_address(ce_id);
	u32 nentries, ctrl_addr = ath10k_ce_base_address(ar, ce_id);


	nentries = roundup_pow_of_two(attr->src_nentries);
	nentries = roundup_pow_of_two(attr->src_nentries);


@@ -869,7 +869,7 @@ static int ath10k_ce_init_dest_ring(struct ath10k *ar,
	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
	struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id];
	struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id];
	struct ath10k_ce_ring *dest_ring = ce_state->dest_ring;
	struct ath10k_ce_ring *dest_ring = ce_state->dest_ring;
	u32 nentries, ctrl_addr = ath10k_ce_base_address(ce_id);
	u32 nentries, ctrl_addr = ath10k_ce_base_address(ar, ce_id);


	nentries = roundup_pow_of_two(attr->dest_nentries);
	nentries = roundup_pow_of_two(attr->dest_nentries);


@@ -1051,7 +1051,7 @@ int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id,


static void ath10k_ce_deinit_src_ring(struct ath10k *ar, unsigned int ce_id)
static void ath10k_ce_deinit_src_ring(struct ath10k *ar, unsigned int ce_id)
{
{
	u32 ctrl_addr = ath10k_ce_base_address(ce_id);
	u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id);


	ath10k_ce_src_ring_base_addr_set(ar, ctrl_addr, 0);
	ath10k_ce_src_ring_base_addr_set(ar, ctrl_addr, 0);
	ath10k_ce_src_ring_size_set(ar, ctrl_addr, 0);
	ath10k_ce_src_ring_size_set(ar, ctrl_addr, 0);
@@ -1061,7 +1061,7 @@ static void ath10k_ce_deinit_src_ring(struct ath10k *ar, unsigned int ce_id)


static void ath10k_ce_deinit_dest_ring(struct ath10k *ar, unsigned int ce_id)
static void ath10k_ce_deinit_dest_ring(struct ath10k *ar, unsigned int ce_id)
{
{
	u32 ctrl_addr = ath10k_ce_base_address(ce_id);
	u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id);


	ath10k_ce_dest_ring_base_addr_set(ar, ctrl_addr, 0);
	ath10k_ce_dest_ring_base_addr_set(ar, ctrl_addr, 0);
	ath10k_ce_dest_ring_size_set(ar, ctrl_addr, 0);
	ath10k_ce_dest_ring_size_set(ar, ctrl_addr, 0);
@@ -1098,7 +1098,7 @@ int ath10k_ce_alloc_pipe(struct ath10k *ar, int ce_id,


	ce_state->ar = ar;
	ce_state->ar = ar;
	ce_state->id = ce_id;
	ce_state->id = ce_id;
	ce_state->ctrl_addr = ath10k_ce_base_address(ce_id);
	ce_state->ctrl_addr = ath10k_ce_base_address(ar, ce_id);
	ce_state->attr_flags = attr->flags;
	ce_state->attr_flags = attr->flags;
	ce_state->src_sz_max = attr->src_sz_max;
	ce_state->src_sz_max = attr->src_sz_max;


+1 −1
Original line number Original line Diff line number Diff line
@@ -394,7 +394,7 @@ struct ce_attr {
#define DST_WATERMARK_HIGH_RESET		0
#define DST_WATERMARK_HIGH_RESET		0
#define DST_WATERMARK_ADDRESS			0x0050
#define DST_WATERMARK_ADDRESS			0x0050


static inline u32 ath10k_ce_base_address(unsigned int ce_id)
static inline u32 ath10k_ce_base_address(struct ath10k *ar, unsigned int ce_id)
{
{
	return CE0_BASE_ADDRESS + (CE1_BASE_ADDRESS - CE0_BASE_ADDRESS) * ce_id;
	return CE0_BASE_ADDRESS + (CE1_BASE_ADDRESS - CE0_BASE_ADDRESS) * ce_id;
}
}
+44 −0
Original line number Original line Diff line number Diff line
@@ -57,6 +57,34 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
			.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
			.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
		},
		},
	},
	},
	{
		.id = QCA6174_HW_2_1_VERSION,
		.name = "qca6174 hw2.1",
		.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
		.uart_pin = 6,
		.fw = {
			.dir = QCA6174_HW_2_1_FW_DIR,
			.fw = QCA6174_HW_2_1_FW_FILE,
			.otp = QCA6174_HW_2_1_OTP_FILE,
			.board = QCA6174_HW_2_1_BOARD_DATA_FILE,
			.board_size = QCA6174_BOARD_DATA_SZ,
			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
		},
	},
	{
		.id = QCA6174_HW_3_0_VERSION,
		.name = "qca6174 hw3.0",
		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
		.uart_pin = 6,
		.fw = {
			.dir = QCA6174_HW_3_0_FW_DIR,
			.fw = QCA6174_HW_3_0_FW_FILE,
			.otp = QCA6174_HW_3_0_OTP_FILE,
			.board = QCA6174_HW_3_0_BOARD_DATA_FILE,
			.board_size = QCA6174_BOARD_DATA_SZ,
			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
		},
	},
};
};


static void ath10k_send_suspend_complete(struct ath10k *ar)
static void ath10k_send_suspend_complete(struct ath10k *ar)
@@ -1308,6 +1336,7 @@ EXPORT_SYMBOL(ath10k_core_unregister);


struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
				  enum ath10k_bus bus,
				  enum ath10k_bus bus,
				  enum ath10k_hw_rev hw_rev,
				  const struct ath10k_hif_ops *hif_ops)
				  const struct ath10k_hif_ops *hif_ops)
{
{
	struct ath10k *ar;
	struct ath10k *ar;
@@ -1320,9 +1349,24 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
	ar->ath_common.priv = ar;
	ar->ath_common.priv = ar;
	ar->ath_common.hw = ar->hw;
	ar->ath_common.hw = ar->hw;
	ar->dev = dev;
	ar->dev = dev;
	ar->hw_rev = hw_rev;
	ar->hif.ops = hif_ops;
	ar->hif.ops = hif_ops;
	ar->hif.bus = bus;
	ar->hif.bus = bus;


	switch (hw_rev) {
	case ATH10K_HW_QCA988X:
		ar->regs = &qca988x_regs;
		break;
	case ATH10K_HW_QCA6174:
		ar->regs = &qca6174_regs;
		break;
	default:
		ath10k_err(ar, "unsupported core hardware revision %d\n",
			   hw_rev);
		ret = -ENOTSUPP;
		goto err_free_mac;
	}

	init_completion(&ar->scan.started);
	init_completion(&ar->scan.started);
	init_completion(&ar->scan.completed);
	init_completion(&ar->scan.completed);
	init_completion(&ar->scan.on_channel);
	init_completion(&ar->scan.on_channel);
+3 −3
Original line number Original line Diff line number Diff line
@@ -471,6 +471,7 @@ struct ath10k {
	struct device *dev;
	struct device *dev;
	u8 mac_addr[ETH_ALEN];
	u8 mac_addr[ETH_ALEN];


	enum ath10k_hw_rev hw_rev;
	u32 chip_id;
	u32 chip_id;
	u32 target_version;
	u32 target_version;
	u8 fw_version_major;
	u8 fw_version_major;
@@ -486,9 +487,6 @@ struct ath10k {


	DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
	DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);


	struct targetdef *targetdef;
	struct hostdef *hostdef;

	bool p2p;
	bool p2p;


	struct {
	struct {
@@ -498,6 +496,7 @@ struct ath10k {


	struct completion target_suspend;
	struct completion target_suspend;


	const struct ath10k_hw_regs *regs;
	struct ath10k_bmi bmi;
	struct ath10k_bmi bmi;
	struct ath10k_wmi wmi;
	struct ath10k_wmi wmi;
	struct ath10k_htc htc;
	struct ath10k_htc htc;
@@ -662,6 +661,7 @@ struct ath10k {


struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
				  enum ath10k_bus bus,
				  enum ath10k_bus bus,
				  enum ath10k_hw_rev hw_rev,
				  const struct ath10k_hif_ops *hif_ops);
				  const struct ath10k_hif_ops *hif_ops);
void ath10k_core_destroy(struct ath10k *ar);
void ath10k_core_destroy(struct ath10k *ar);


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