ARM: dts: rockchip: add veyron-jaq board (d5f9f4ff) · Commits · e / devices / android_kernel_fairphone_FP3

Documentation/devicetree/bindings/arm/rockchip.txt

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		@@ -31,6 +31,13 @@ Rockchip platforms device tree bindings
		Required root node properties:
		- compatible = "netxeon,r89", "rockchip,rk3288";

		- Google Jaq (Haier Chromebook 11 and more):
		Required root node properties:
		- compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
		"google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
		"google,veyron-jaq-rev1", "google,veyron-jaq",
		"google,veyron", "rockchip,rk3288";

		- Google Jerry (Hisense Chromebook C11 and more):
		Required root node properties:
		- compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",

arch/arm/boot/dts/Makefile

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		@@ -507,6 +507,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
		rk3288-firefly-beta.dtb \
		rk3288-firefly.dtb \
		rk3288-r89.dtb \
		rk3288-veyron-jaq.dtb \
		rk3288-veyron-jerry.dtb \
		rk3288-veyron-minnie.dtb \
		rk3288-veyron-pinky.dtb \

arch/arm/boot/dts/rk3288-veyron-jaq.dts

0 → 100644

+176 −0

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		/*
		* Google Veyron Jaq Rev 1+ board device tree source
		*
		* Copyright 2015 Google, Inc
		*
		* This file is dual-licensed: you can use it either under the terms
		* of the GPL or the X11 license, at your option. Note that this dual
		* licensing only applies to this file, and not this project as a
		* whole.
		*
		* a) This file is free software; you can redistribute it and/or
		* modify it under the terms of the GNU General Public License as
		* published by the Free Software Foundation; either version 2 of the
		* License, or (at your option) any later version.
		*
		* This file is distributed in the hope that it will be useful,
		* but WITHOUT ANY WARRANTY; without even the implied warranty of
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		*
		* Or, alternatively,
		*
		* b) Permission is hereby granted, free of charge, to any person
		* obtaining a copy of this software and associated documentation
		* files (the "Software"), to deal in the Software without
		* restriction, including without limitation the rights to use,
		* copy, modify, merge, publish, distribute, sublicense, and/or
		* sell copies of the Software, and to permit persons to whom the
		* Software is furnished to do so, subject to the following
		* conditions:
		*
		* The above copyright notice and this permission notice shall be
		* included in all copies or substantial portions of the Software.
		*
		* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
		* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
		* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
		* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
		* OTHER DEALINGS IN THE SOFTWARE.
		*/

		/dts-v1/;

		#include "rk3288-veyron-chromebook.dtsi"
		#include "cros-ec-sbs.dtsi"

		/ {
		model = "Google Jaq";
		compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
		"google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
		"google,veyron-jaq-rev1", "google,veyron-jaq",
		"google,veyron", "rockchip,rk3288";

		panel_regulator: panel-regulator {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&lcd_enable_h>;
		regulator-name = "panel_regulator";
		vin-supply = <&vcc33_sys>;
		};

		vcc18_lcd: vcc18-lcd {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&avdd_1v8_disp_en>;
		regulator-name = "vcc18_lcd";
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <&vcc18_wl>;
		};

		backlight_regulator: backlight-regulator {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&bl_pwr_en>;
		regulator-name = "backlight_regulator";
		vin-supply = <&vcc33_sys>;
		startup-delay-us = <15000>;
		};
		};

		&rk808 {
		pinctrl-names = "default";
		pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
		dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
		<&gpio7 15 GPIO_ACTIVE_HIGH>;

		regulators {
		mic_vcc: LDO_REG2 {
		regulator-name = "mic_vcc";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-state-mem {
		regulator-off-in-suspend;
		};
		};
		};
		};

		&sdmmc {
		disable-wp;
		pinctrl-names = "default";
		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
		&sdmmc_bus4>;
		};

		&vcc_5v {
		enable-active-high;
		gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&drv_5v>;
		};

		&vcc50_hdmi {
		enable-active-high;
		gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&vcc50_hdmi_en>;
		};

		&pinctrl {
		backlight {
		bl_pwr_en: bl_pwr_en {
		rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
		};
		};

		buck-5v {
		drv_5v: drv-5v {
		rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
		};
		};

		edp {
		edp_hpd: edp_hpd {
		rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
		};
		};

		hdmi {
		vcc50_hdmi_en: vcc50-hdmi-en {
		rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
		};
		};

		lcd {
		lcd_enable_h: lcd-en {
		rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		avdd_1v8_disp_en: avdd-1v8-disp-en {
		rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
		};
		};

		pmic {
		dvs_1: dvs-1 {
		rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
		};

		dvs_2: dvs-2 {
		rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
		};
		};
		};