Commit d5dc861b authored Jul 22, 2015 by Toshi Kani Committed by Thomas Gleixner Aug 20, 2015

x86/mm/pat: Add comments to cachemode translation tables

Add comments to the cachemode translation tables to clarify that
the default values are set as minimal supported mode, which are
necessary to handle WC and WT fallback to UC- when they are not
enabled.

Signed-off-by: Toshi Kani <toshi.kani@hp.com>
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1437588371-28223-1-git-send-email-toshi.kani@hp.com

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

parent 4c73e892

arch/x86/mm/init.c

+5 −2

Original line number	Diff line number	Diff line
		@@ -30,8 +30,11 @@
		/*
		* Tables translating between page_cache_type_t and pte encoding.
		*
		* Minimal supported modes are defined statically, they are modified
		* during bootup if more supported cache modes are available.
		* The default values are defined statically as minimal supported mode;
		* WC and WT fall back to UC-. pat_init() updates these values to support
		* more cache modes, WC and WT, when it is safe to do so. See pat_init()
		* for the details. Note, __early_ioremap() used during early boot-time
		* takes pgprot_t (pte encoding) and does not use these tables.
		*
		* Index into __cachemode2pte_tbl[] is the cachemode.
		*