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Commit d5b160d3 authored by David S. Miller's avatar David S. Miller
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Merge tag 'wireless-drivers-next-for-davem-2016-07-22' of...

Merge tag 'wireless-drivers-next-for-davem-2016-07-22' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next

Kalle Valo says:

====================
pull-request: wireless-drivers-next 2016-07-22

I'm sick so I have to keep this short, but here's the last pull request
to net-next. This time there's a trivial conflict with mtd tree:

http://lkml.kernel.org/g/20160720123133.44dab209@canb.auug.org.au



We concluded with Brian (CCed) that it's best that we ask Linus to fix
this. The patches have been in linux-next for a couple of days. This
time I haven't done any merge tests so I don't know if there are any
other conflicts etc.

Please let me know if there are any problems.

wireless-drivers-next patches for 4.8

Major changes:

wl18xx

* add initial mesh support

bcma

* serial flash support on non-MIPS SoCs

ath10k

* enable support for QCA9888
* disable wake_tx_queue() mac80211 op for older devices to workaround
  throughput regression

ath9k

* implement temperature compensation support for AR9003+
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 15657841 cb6a1151
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+32 −9
Original line number Diff line number Diff line
* Texas Instruments wl1271 wireless lan controller
* Texas Instruments wl12xx/wl18xx wireless lan controller

The wl1271 chip can be connected via SPI or via SDIO. This
The wl12xx/wl18xx chips can be connected via SPI or via SDIO. This
document describes the binding for the SPI connected chip.

Required properties:
- compatible :          Should be "ti,wl1271"
- compatible :          Should be one of the following:
    * "ti,wl1271"
    * "ti,wl1273"
    * "ti,wl1281"
    * "ti,wl1283"
    * "ti,wl1801"
    * "ti,wl1805"
    * "ti,wl1807"
    * "ti,wl1831"
    * "ti,wl1835"
    * "ti,wl1837"
- reg :                 Chip select address of device
- spi-max-frequency :   Maximum SPI clocking speed of device in Hz
- ref-clock-frequency : Reference clock frequency
- interrupt-parent, interrupts :
                        Should contain parameters for 1 interrupt line.
                        Interrupt parameters: parent, line number, type.
- vwlan-supply :        Point the node of the regulator that powers/enable the wl1271 chip
- vwlan-supply :        Point the node of the regulator that powers/enable the
                        wl12xx/wl18xx chip

Optional properties:
- ref-clock-frequency : Reference clock frequency (should be set for wl12xx)
- clock-xtal :          boolean, clock is generated from XTAL

- Please consult Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -21,16 +32,28 @@ Optional properties:

Examples:

For wl12xx family:
&spi1 {
	wl1271@1 {
	wlcore: wlcore@1 {
		compatible = "ti,wl1271";

		reg = <1>;
		spi-max-frequency = <48000000>;
		clock-xtal;
		ref-clock-frequency = <38400000>;
		interrupt-parent = <&gpio3>;
		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
		vwlan-supply = <&vwlan_fixed>;
		clock-xtal;
		ref-clock-frequency = <38400000>;
	};
};

For wl18xx family:
&spi0 {
	wlcore: wlcore@0 {
		compatible = "ti,wl1835";
		reg = <0>;
		spi-max-frequency = <48000000>;
		interrupt-parent = <&gpio0>;
		interrupts = <27 IRQ_TYPE_EDGE_RISING>;
		vwlan-supply = <&vwlan_fixed>;
	};
};
+9 −2
Original line number Diff line number Diff line
@@ -76,9 +76,16 @@ config BCMA_PFLASH
	default y

config BCMA_SFLASH
	bool
	depends on BCMA_DRIVER_MIPS
	bool "ChipCommon-attached serial flash support"
	depends on BCMA_HOST_SOC
	default y
	help
	  Some cheap devices have serial flash connected to the ChipCommon
	  instead of independent SPI controller. It requires using a separated
	  driver that implements ChipCommon specific interface communication.

	  Enabling this symbol will let bcma recognize serial flash and register
	  it as platform device.

config BCMA_NFLASH
	bool
+5 −4
Original line number Diff line number Diff line
@@ -33,11 +33,12 @@ static bool bcma_wait_reg(struct bcma_bus *bus, void __iomem *addr, u32 mask,
void bcma_chipco_b_mii_write(struct bcma_drv_cc_b *ccb, u32 offset, u32 value)
{
	struct bcma_bus *bus = ccb->core->bus;
	void __iomem *mii = ccb->mii;

	writel(offset, ccb->mii + 0x00);
	bcma_wait_reg(bus, ccb->mii + 0x00, 0x0100, 0x0000, 100);
	writel(value, ccb->mii + 0x04);
	bcma_wait_reg(bus, ccb->mii + 0x00, 0x0100, 0x0000, 100);
	writel(offset, mii + BCMA_CCB_MII_MNG_CTL);
	bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
	writel(value, mii + BCMA_CCB_MII_MNG_CMD_DATA);
	bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
}
EXPORT_SYMBOL_GPL(bcma_chipco_b_mii_write);

+1 −0
Original line number Diff line number Diff line
@@ -295,6 +295,7 @@ static const struct pci_device_id bcma_pci_bridge_tbl[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4359) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4360) },
	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_BROADCOM, 0x4365, PCI_VENDOR_ID_DELL, 0x0016) },
	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_BROADCOM, 0x4365, PCI_VENDOR_ID_FOXCONN, 0xe092) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x43a0) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x43a9) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x43aa) },
+1 −1
Original line number Diff line number Diff line
@@ -114,7 +114,7 @@ config MTD_SST25L

config MTD_BCM47XXSFLASH
	tristate "R/O support for serial flash on BCMA bus"
	depends on BCMA_SFLASH
	depends on BCMA_SFLASH && (MIPS || ARM)
	help
	  BCMA bus can have various flash memories attached, they are
	  registered by bcma as platform devices. This enables driver for
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