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Commit d563a6bb authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge tag 'v4.1-rc5' into x86/mm, to refresh the tree before applying new changes



Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 1fcb61c5 ba155e2d
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+3 −1
Original line number Diff line number Diff line
@@ -17,7 +17,8 @@ Required properties:
- #clock-cells: from common clock binding; shall be set to 1.
- clocks: from common clock binding; list of parent clock
  handles, shall be xtal reference clock or xtal and clkin for
  si5351c only.
  si5351c only. Corresponding clock input names are "xtal" and
  "clkin" respectively.
- #address-cells: shall be set to 1.
- #size-cells: shall be set to 0.

@@ -71,6 +72,7 @@ i2c-master-node {

		/* connect xtal input to 25MHz reference */
		clocks = <&ref25>;
		clock-names = "xtal";

		/* connect xtal input as source of pll0 and pll1 */
		silabs,pll-source = <0 0>, <1 0>;
+3 −3
Original line number Diff line number Diff line
@@ -8,8 +8,8 @@ Required properties:
               is not Linux-only, but in case of Linux, see the "m25p_ids"
               table in drivers/mtd/devices/m25p80.c for the list of supported
               chips.
               Must also include "nor-jedec" for any SPI NOR flash that can be
               identified by the JEDEC READ ID opcode (0x9F).
               Must also include "jedec,spi-nor" for any SPI NOR flash that can
               be identified by the JEDEC READ ID opcode (0x9F).
- reg : Chip-Select number
- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at

@@ -25,7 +25,7 @@ Example:
	flash: m25p80@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spansion,m25p80", "nor-jedec";
		compatible = "spansion,m25p80", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <40000000>;
		m25p,fast-read;
+2 −1
Original line number Diff line number Diff line
@@ -3,7 +3,8 @@
Required properties:
- compatible: Should be "cdns,[<chip>-]{emac}"
  Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC.
  or the generic form: "cdns,emac".
  Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC.
  Or the generic form: "cdns,emac".
- reg: Address and length of the register set for the device
- interrupts: Should contain macb interrupt
- phy-mode: see ethernet.txt file in the same directory.
+3 −0
Original line number Diff line number Diff line
@@ -198,6 +198,9 @@ TTY_IO_ERROR If set, causes all subsequent userspace read/write

TTY_OTHER_CLOSED	Device is a pty and the other side has closed.

TTY_OTHER_DONE		Device is a pty and the other side has closed and
			all pending input processing has been completed.

TTY_NO_WRITE_SPLIT	Prevent driver from splitting up writes into
			smaller chunks.

+14 −4
Original line number Diff line number Diff line
@@ -169,6 +169,10 @@ Shadow pages contain the following information:
    Contains the value of cr4.smep && !cr0.wp for which the page is valid
    (pages for which this is true are different from other pages; see the
    treatment of cr0.wp=0 below).
  role.smap_andnot_wp:
    Contains the value of cr4.smap && !cr0.wp for which the page is valid
    (pages for which this is true are different from other pages; see the
    treatment of cr0.wp=0 below).
  gfn:
    Either the guest page table containing the translations shadowed by this
    page, or the base page frame for linear translations.  See role.direct.
@@ -344,10 +348,16 @@ on fault type:

(user write faults generate a #PF)

In the first case there is an additional complication if CR4.SMEP is
enabled: since we've turned the page into a kernel page, the kernel may now
execute it.  We handle this by also setting spte.nx.  If we get a user
fetch or read fault, we'll change spte.u=1 and spte.nx=gpte.nx back.
In the first case there are two additional complications:
- if CR4.SMEP is enabled: since we've turned the page into a kernel page,
  the kernel may now execute it.  We handle this by also setting spte.nx.
  If we get a user fetch or read fault, we'll change spte.u=1 and
  spte.nx=gpte.nx back.
- if CR4.SMAP is disabled: since the page has been changed to a kernel
  page, it can not be reused when CR4.SMAP is enabled. We set
  CR4.SMAP && !CR0.WP into shadow page's role to avoid this case. Note,
  here we do not care the case that CR4.SMAP is enabled since KVM will
  directly inject #PF to guest due to failed permission check.

To prevent an spte that was converted into a kernel page with cr0.wp=0
from being written by the kernel after cr0.wp has changed to 1, we make
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