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Commit d54a45e2 authored by Ranjith Lohithakshan's avatar Ranjith Lohithakshan Committed by Paul Walmsley
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OMAP3: clock: fix enable bit used for dpll4_m4x2 clock 



The enable bit for dpll4_m4x2 clock should be OMAP3430_PWRDN_DSS1_SHIFT.
The code erroneously uses OMAP3430_PWRDN_CAM_SHIFT which is meant for
dpll4_m5x2 clock.

This came into notice during a recent review of the clock tree.

Signed-off-by: default avatarRanjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 766d305f

arch/arm/mach-omap2/clock3xxx_data.c

+1 −1
Original line number Diff line number Diff line
@@ -895,7 +895,7 @@ static struct clk dpll4_m4x2_ck = { 
	.ops		= &clkops_omap2_dflt_wait,

	.parent		= &dpll4_m4_ck,

	.enable_reg	= OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),

	.enable_bit	= OMAP3430_PWRDN_CAM_SHIFT,

	.enable_bit	= OMAP3430_PWRDN_DSS1_SHIFT,

	.flags		= INVERT_ENABLE,

	.clkdm_name	= "dpll4_clkdm",

	.recalc		= &omap3_clkoutx2_recalc,