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Commit d5307114 authored by Kalle Valo's avatar Kalle Valo
Browse files

Merge ath-next from ath.git 

Major changes in ath10k:

* add support for qca6174 hardware
* enable RX batching to reduce CPU load
parents 8cd4cbf2 608b8f73

drivers/net/wireless/ath/ath10k/Makefile

+3 −1
Original line number Diff line number Diff line
@@ -9,12 +9,14 @@ ath10k_core-y += mac.o \ 
		 txrx.o \

		 wmi.o \

		 wmi-tlv.o \

		 bmi.o

		 bmi.o \

		 hw.o



ath10k_core-$(CONFIG_ATH10K_DEBUGFS) += spectral.o

ath10k_core-$(CONFIG_NL80211_TESTMODE) += testmode.o

ath10k_core-$(CONFIG_ATH10K_TRACING) += trace.o

ath10k_core-$(CONFIG_THERMAL) += thermal.o

ath10k_core-$(CONFIG_MAC80211_DEBUGFS) += debugfs_sta.o



obj-$(CONFIG_ATH10K_PCI) += ath10k_pci.o

ath10k_pci-y += pci.o \

drivers/net/wireless/ath/ath10k/ce.c

+6 −6
Original line number Diff line number Diff line
@@ -803,7 +803,7 @@ int ath10k_ce_disable_interrupts(struct ath10k *ar) 
	int ce_id;



	for (ce_id = 0; ce_id < CE_COUNT; ce_id++) {

		u32 ctrl_addr = ath10k_ce_base_address(ce_id);

		u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id);



		ath10k_ce_copy_complete_intr_disable(ar, ctrl_addr);

		ath10k_ce_error_intr_disable(ar, ctrl_addr);
@@ -832,7 +832,7 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar, 
	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);

	struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id];

	struct ath10k_ce_ring *src_ring = ce_state->src_ring;

	u32 nentries, ctrl_addr = ath10k_ce_base_address(ce_id);

	u32 nentries, ctrl_addr = ath10k_ce_base_address(ar, ce_id);



	nentries = roundup_pow_of_two(attr->src_nentries);
@@ -869,7 +869,7 @@ static int ath10k_ce_init_dest_ring(struct ath10k *ar, 
	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);

	struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id];

	struct ath10k_ce_ring *dest_ring = ce_state->dest_ring;

	u32 nentries, ctrl_addr = ath10k_ce_base_address(ce_id);

	u32 nentries, ctrl_addr = ath10k_ce_base_address(ar, ce_id);



	nentries = roundup_pow_of_two(attr->dest_nentries);
@@ -1051,7 +1051,7 @@ int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id, 


static void ath10k_ce_deinit_src_ring(struct ath10k *ar, unsigned int ce_id)

{

	u32 ctrl_addr = ath10k_ce_base_address(ce_id);

	u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id);



	ath10k_ce_src_ring_base_addr_set(ar, ctrl_addr, 0);

	ath10k_ce_src_ring_size_set(ar, ctrl_addr, 0);
@@ -1061,7 +1061,7 @@ static void ath10k_ce_deinit_src_ring(struct ath10k *ar, unsigned int ce_id) 


static void ath10k_ce_deinit_dest_ring(struct ath10k *ar, unsigned int ce_id)

{

	u32 ctrl_addr = ath10k_ce_base_address(ce_id);

	u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id);



	ath10k_ce_dest_ring_base_addr_set(ar, ctrl_addr, 0);

	ath10k_ce_dest_ring_size_set(ar, ctrl_addr, 0);
@@ -1098,7 +1098,7 @@ int ath10k_ce_alloc_pipe(struct ath10k *ar, int ce_id, 


	ce_state->ar = ar;

	ce_state->id = ce_id;

	ce_state->ctrl_addr = ath10k_ce_base_address(ce_id);

	ce_state->ctrl_addr = ath10k_ce_base_address(ar, ce_id);

	ce_state->attr_flags = attr->flags;

	ce_state->src_sz_max = attr->src_sz_max;

drivers/net/wireless/ath/ath10k/ce.h

+1 −1
Original line number Diff line number Diff line
@@ -394,7 +394,7 @@ struct ce_attr { 
#define DST_WATERMARK_HIGH_RESET		0

#define DST_WATERMARK_ADDRESS			0x0050



static inline u32 ath10k_ce_base_address(unsigned int ce_id)

static inline u32 ath10k_ce_base_address(struct ath10k *ar, unsigned int ce_id)

{

	return CE0_BASE_ADDRESS + (CE1_BASE_ADDRESS - CE0_BASE_ADDRESS) * ce_id;

}

drivers/net/wireless/ath/ath10k/core.c

+72 −0
Original line number Diff line number Diff line
@@ -57,6 +57,49 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { 
			.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,

		},

	},

	{

		.id = QCA6174_HW_2_1_VERSION,

		.name = "qca6174 hw2.1",

		.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,

		.uart_pin = 6,

		.fw = {

			.dir = QCA6174_HW_2_1_FW_DIR,

			.fw = QCA6174_HW_2_1_FW_FILE,

			.otp = QCA6174_HW_2_1_OTP_FILE,

			.board = QCA6174_HW_2_1_BOARD_DATA_FILE,

			.board_size = QCA6174_BOARD_DATA_SZ,

			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,

		},

	},

	{

		.id = QCA6174_HW_3_0_VERSION,

		.name = "qca6174 hw3.0",

		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,

		.uart_pin = 6,

		.fw = {

			.dir = QCA6174_HW_3_0_FW_DIR,

			.fw = QCA6174_HW_3_0_FW_FILE,

			.otp = QCA6174_HW_3_0_OTP_FILE,

			.board = QCA6174_HW_3_0_BOARD_DATA_FILE,

			.board_size = QCA6174_BOARD_DATA_SZ,

			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,

		},

	},

	{

		.id = QCA6174_HW_3_2_VERSION,

		.name = "qca6174 hw3.2",

		.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,

		.uart_pin = 6,

		.fw = {

			/* uses same binaries as hw3.0 */

			.dir = QCA6174_HW_3_0_FW_DIR,

			.fw = QCA6174_HW_3_0_FW_FILE,

			.otp = QCA6174_HW_3_0_OTP_FILE,

			.board = QCA6174_HW_3_0_BOARD_DATA_FILE,

			.board_size = QCA6174_BOARD_DATA_SZ,

			.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,

		},

	},

};



static void ath10k_send_suspend_complete(struct ath10k *ar)
@@ -927,6 +970,7 @@ static int ath10k_core_init_firmware_features(struct ath10k *ar) 
	case ATH10K_FW_WMI_OP_VERSION_TLV:

		ar->max_num_peers = TARGET_TLV_NUM_PEERS;

		ar->max_num_stations = TARGET_TLV_NUM_STATIONS;

		ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;

		ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;

		break;

	case ATH10K_FW_WMI_OP_VERSION_UNSET:
@@ -1060,6 +1104,18 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) 
		goto err_hif_stop;

	}



	/* If firmware indicates Full Rx Reorder support it must be used in a

	 * slightly different manner. Let HTT code know.

	 */

	ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,

						ar->wmi.svc_map));



	status = ath10k_htt_rx_ring_refill(ar);

	if (status) {

		ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);

		goto err_hif_stop;

	}



	/* we don't care about HTT in UTF mode */

	if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {

		status = ath10k_htt_setup(&ar->htt);
@@ -1295,6 +1351,7 @@ EXPORT_SYMBOL(ath10k_core_unregister); 


struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,

				  enum ath10k_bus bus,

				  enum ath10k_hw_rev hw_rev,

				  const struct ath10k_hif_ops *hif_ops)

{

	struct ath10k *ar;
@@ -1307,9 +1364,24 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 
	ar->ath_common.priv = ar;

	ar->ath_common.hw = ar->hw;

	ar->dev = dev;

	ar->hw_rev = hw_rev;

	ar->hif.ops = hif_ops;

	ar->hif.bus = bus;



	switch (hw_rev) {

	case ATH10K_HW_QCA988X:

		ar->regs = &qca988x_regs;

		break;

	case ATH10K_HW_QCA6174:

		ar->regs = &qca6174_regs;

		break;

	default:

		ath10k_err(ar, "unsupported core hardware revision %d\n",

			   hw_rev);

		ret = -ENOTSUPP;

		goto err_free_mac;

	}



	init_completion(&ar->scan.started);

	init_completion(&ar->scan.completed);

	init_completion(&ar->scan.on_channel);

drivers/net/wireless/ath/ath10k/core.h

+32 −8
Original line number Diff line number Diff line
@@ -97,6 +97,11 @@ struct ath10k_skb_cb { 
	} bcn;

} __packed;



struct ath10k_skb_rxcb {

	dma_addr_t paddr;

	struct hlist_node hlist;

};



static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)

{

	BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
@@ -104,6 +109,15 @@ static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 
	return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;

}



static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)

{

	BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));

	return (struct ath10k_skb_rxcb *)skb->cb;

}



#define ATH10K_RXCB_SKB(rxcb) \

		container_of((void *)rxcb, struct sk_buff, cb)



static inline u32 host_interest_item_address(u32 item_offset)

{

	return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
@@ -239,10 +253,21 @@ struct ath10k_sta { 
	u32 smps;



	struct work_struct update_wk;



#ifdef CONFIG_MAC80211_DEBUGFS

	/* protected by conf_mutex */

	bool aggr_mode;

#endif

};



#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)



enum ath10k_beacon_state {

	ATH10K_BEACON_SCHEDULED = 0,

	ATH10K_BEACON_SENDING,

	ATH10K_BEACON_SENT,

};



struct ath10k_vif {

	struct list_head list;
@@ -253,7 +278,7 @@ struct ath10k_vif { 
	u32 dtim_period;

	struct sk_buff *beacon;

	/* protected by data_lock */

	bool beacon_sent;

	enum ath10k_beacon_state beacon_state;

	void *beacon_buf;

	dma_addr_t beacon_paddr;
@@ -266,10 +291,8 @@ struct ath10k_vif { 
	u32 aid;

	u8 bssid[ETH_ALEN];



	struct work_struct wep_key_work;

	struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];

	u8 def_wep_key_idx;

	u8 def_wep_key_newidx;

	s8 def_wep_key_idx;



	u16 tx_seq_no;
@@ -296,6 +319,7 @@ struct ath10k_vif { 
	bool use_cts_prot;

	int num_legacy_stations;

	int txpower;

	struct wmi_wmm_params_all_arg wmm_params;

};



struct ath10k_vif_iter {
@@ -326,6 +350,7 @@ struct ath10k_debug { 


	/* protected by conf_mutex */

	u32 fw_dbglog_mask;

	u32 fw_dbglog_level;

	u32 pktlog_filter;

	u32 reg_addr;

	u32 nf_cal_period;
@@ -452,6 +477,7 @@ struct ath10k { 
	struct device *dev;

	u8 mac_addr[ETH_ALEN];



	enum ath10k_hw_rev hw_rev;

	u32 chip_id;

	u32 target_version;

	u8 fw_version_major;
@@ -467,9 +493,6 @@ struct ath10k { 


	DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);



	struct targetdef *targetdef;

	struct hostdef *hostdef;



	bool p2p;



	struct {
@@ -479,6 +502,7 @@ struct ath10k { 


	struct completion target_suspend;



	const struct ath10k_hw_regs *regs;

	struct ath10k_bmi bmi;

	struct ath10k_wmi wmi;

	struct ath10k_htc htc;
@@ -559,7 +583,6 @@ struct ath10k { 
	u8 cfg_tx_chainmask;

	u8 cfg_rx_chainmask;



	struct wmi_pdev_set_wmm_params_arg wmm_params;

	struct completion install_key_done;



	struct completion vdev_setup_done;
@@ -643,6 +666,7 @@ struct ath10k { 


struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,

				  enum ath10k_bus bus,

				  enum ath10k_hw_rev hw_rev,

				  const struct ath10k_hif_ops *hif_ops);

void ath10k_core_destroy(struct ath10k *ar);