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Commit d50b9e2e authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Kukjin Kim
Browse files

ARM: SAMSUNG: remove unused DMA infrastructure 



Everything uses dmaengine now, so there is no reason to
keep this around any longer. Thanks to everyone who was involved
in moving the users over to use the dmaengine APIs.

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Acked-by: default avatarVinod Koul <vinod.koul@intel.com>
Signed-off-by: default avatarKukjin Kim <kgene@kernel.org>
parent 32b0aa9a

Documentation/arm/Samsung-S3C24XX/DMA.txt

deleted100644 → 0
+0 −46
Original line number Diff line number Diff line 
			S3C2410 DMA

			===========



Introduction

------------



   The kernel provides an interface to manage DMA transfers

   using the DMA channels in the CPU, so that the central

   duty of managing channel mappings, and programming the

   channel generators is in one place.





DMA Channel Ordering

--------------------



   Many of the range do not have connections for the DMA

   channels to all sources, which means that some devices

   have a restricted number of channels that can be used.



   To allow flexibility for each CPU type and board, the

   DMA code can be given a DMA ordering structure which

   allows the order of channel search to be specified, as

   well as allowing the prohibition of certain claims.



   struct s3c24xx_dma_order has a list of channels, and

   each channel within has a slot for a list of DMA

   channel numbers. The slots are searched in order for

   the presence of a DMA channel number with DMA_CH_VALID

   or-ed in.



   If the order has the flag DMA_CH_NEVER set, then after

   checking the channel list, the system will return no

   found channel, thus denying the request.



   A board support file can call s3c24xx_dma_order_set()

   to register a complete ordering set. The routine will

   copy the data, so the original can be discarded with

   __initdata.





Authour

-------



Ben Dooks,

Copyright (c) 2007 Ben Dooks, Simtec Electronics

Licensed under the GPL v2

arch/arm/mach-exynos/include/mach/dma.h

deleted100644 → 0
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Original line number Diff line number Diff line 
/*

 * Copyright (C) 2010 Samsung Electronics Co. Ltd.

 *	Jaswinder Singh <jassi.brar@samsung.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

 */



#ifndef __MACH_DMA_H

#define __MACH_DMA_H



/* This platform uses the common DMA API driver for PL330 */

#include <plat/dma-pl330.h>



#endif /* __MACH_DMA_H */

arch/arm/mach-s3c24xx/Kconfig

+0 −42
Original line number Diff line number Diff line
@@ -29,7 +29,6 @@ config CPU_S3C2410 
	default y

	select CPU_ARM920T

	select S3C2410_COMMON_CLK

	select S3C2410_DMA if S3C24XX_DMA

	select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ

	select S3C2410_PM if PM

	help
@@ -40,7 +39,6 @@ config CPU_S3C2412 
	bool "SAMSUNG S3C2412"

	select CPU_ARM926T

	select S3C2412_COMMON_CLK

	select S3C2412_DMA if S3C24XX_DMA

	select S3C2412_PM if PM

	help

	  Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
@@ -50,7 +48,6 @@ config CPU_S3C2416 
	select CPU_ARM926T

	select S3C2416_PM if PM

	select S3C2443_COMMON_CLK

	select S3C2443_DMA if S3C24XX_DMA

	help

	  Support for the S3C2416 SoC from the S3C24XX line
@@ -59,7 +56,6 @@ config CPU_S3C2440 
	select CPU_ARM920T

	select S3C2410_COMMON_CLK

	select S3C2410_PM if PM

	select S3C2440_DMA if S3C24XX_DMA

	help

	  Support for S3C2440 Samsung Mobile CPU based systems.
@@ -67,7 +63,6 @@ config CPU_S3C2442 
	bool "SAMSUNG S3C2442"

	select CPU_ARM920T

	select S3C2410_COMMON_CLK

	select S3C2410_DMA if S3C24XX_DMA

	select S3C2410_PM if PM

	help

	  Support for S3C2442 Samsung Mobile CPU based systems.
@@ -80,7 +75,6 @@ config CPU_S3C2443 
	bool "SAMSUNG S3C2443"

	select CPU_ARM920T

	select S3C2443_COMMON_CLK

	select S3C2443_DMA if S3C24XX_DMA

	help

	  Support for the S3C2443 SoC from the S3C24XX line
@@ -114,27 +108,6 @@ config S3C24XX_SETUP_TS 
	help

	  Compile in platform device definition for Samsung TouchScreen.



config S3C24XX_DMA

	bool "S3C2410 DMA support (deprecated)"

	select S3C_DMA

	help

	  S3C2410 DMA support. This is needed for drivers like sound which

	  use the S3C2410's DMA system to move data to and from the

	  peripheral blocks.



config S3C2410_DMA_DEBUG

	bool "S3C2410 DMA support debug"

	depends on S3C2410_DMA

	help

	  Enable debugging output for the DMA code. This option sends info

	  to the kernel log, at priority KERN_DEBUG.



config S3C2410_DMA

	bool

	depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442)

	help

	  DMA device selection for S3C2410 and compatible CPUs



config S3C2410_PM

	bool

	help
@@ -325,11 +298,6 @@ config CPU_S3C2412_ONLY 
		   !CPU_S3C2442 && !CPU_S3C2443

	default y



config S3C2412_DMA

	bool

	help

	  Internal config node for S3C2412 DMA support



config S3C2412_PM

	bool

	select S3C2412_PM_SLEEP
@@ -438,11 +406,6 @@ endif # CPU_S3C2416 


if CPU_S3C2440



config S3C2440_DMA

	bool

	help

	  Support for S3C2440 specific DMA code5A



config S3C2440_XTAL_12000000

	bool

	help
@@ -601,11 +564,6 @@ endif # CPU_S3C2442 


if CPU_S3C2443 || CPU_S3C2416



config S3C2443_DMA

	bool

	help

	  Internal config node for S3C2443 DMA support



config S3C2443_SETUP_SPI

	bool

	help

arch/arm/mach-s3c24xx/Makefile

+0 −7
Original line number Diff line number Diff line
@@ -12,12 +12,10 @@ 
obj-y				+= common.o



obj-$(CONFIG_CPU_S3C2410)	+= s3c2410.o

obj-$(CONFIG_S3C2410_DMA)	+= dma-s3c2410.o

obj-$(CONFIG_S3C2410_PLL)	+= pll-s3c2410.o

obj-$(CONFIG_S3C2410_PM)	+= pm-s3c2410.o sleep-s3c2410.o



obj-$(CONFIG_CPU_S3C2412)	+= s3c2412.o

obj-$(CONFIG_S3C2412_DMA)	+= dma-s3c2412.o

obj-$(CONFIG_S3C2412_PM)	+= pm-s3c2412.o

obj-$(CONFIG_S3C2412_PM_SLEEP)	+= sleep-s3c2412.o
@@ -27,7 +25,6 @@ obj-$(CONFIG_S3C2416_PM) += pm-s3c2416.o 
obj-$(CONFIG_CPU_S3C2440)	+= s3c2440.o

obj-$(CONFIG_CPU_S3C2442)	+= s3c2442.o

obj-$(CONFIG_CPU_S3C244X)	+= s3c244x.o

obj-$(CONFIG_S3C2440_DMA)	+= dma-s3c2440.o

obj-$(CONFIG_S3C2440_PLL_12000000) += pll-s3c2440-12000000.o

obj-$(CONFIG_S3C2440_PLL_16934400) += pll-s3c2440-16934400.o
@@ -39,15 +36,11 @@ obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o 


# common code



obj-$(CONFIG_S3C24XX_DMA)	+= dma.o



obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += cpufreq-utils.o



obj-$(CONFIG_S3C2410_IOTIMING)	+= iotiming-s3c2410.o

obj-$(CONFIG_S3C2412_IOTIMING)	+= iotiming-s3c2412.o



obj-$(CONFIG_S3C2443_DMA)	+= dma-s3c2443.o



#

# machine support

# following is ordered alphabetically by option text.

arch/arm/mach-s3c24xx/dma-s3c2410.c

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Original line number Diff line number Diff line 
/* linux/arch/arm/mach-s3c2410/dma.c

 *

 * Copyright (c) 2006 Simtec Electronics

 *	Ben Dooks <ben@simtec.co.uk>

 *

 * S3C2410 DMA selection

 *

 * http://armlinux.simtec.co.uk/

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

*/



#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/device.h>

#include <linux/serial_core.h>

#include <linux/serial_s3c.h>



#include <mach/map.h>

#include <mach/dma.h>



#include <plat/cpu.h>

#include <plat/dma-s3c24xx.h>



#include <mach/regs-gpio.h>

#include <plat/regs-dma.h>

#include <mach/regs-lcd.h>

#include <plat/regs-spi.h>



static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {

	[DMACH_XD0] = {

		.name		= "xdreq0",

		.channels[0]	= S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,

	},

	[DMACH_XD1] = {

		.name		= "xdreq1",

		.channels[1]	= S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,

	},

	[DMACH_SDI] = {

		.name		= "sdi",

		.channels[0]	= S3C2410_DCON_CH0_SDI | DMA_CH_VALID,

		.channels[2]	= S3C2410_DCON_CH2_SDI | DMA_CH_VALID,

		.channels[3]	= S3C2410_DCON_CH3_SDI | DMA_CH_VALID,

	},

	[DMACH_SPI0] = {

		.name		= "spi0",

		.channels[1]	= S3C2410_DCON_CH1_SPI | DMA_CH_VALID,

	},

	[DMACH_SPI1] = {

		.name		= "spi1",

		.channels[3]	= S3C2410_DCON_CH3_SPI | DMA_CH_VALID,

	},

	[DMACH_UART0] = {

		.name		= "uart0",

		.channels[0]	= S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,

	},

	[DMACH_UART1] = {

		.name		= "uart1",

		.channels[1]	= S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,

	},

      	[DMACH_UART2] = {

		.name		= "uart2",

		.channels[3]	= S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,

	},

	[DMACH_TIMER] = {

		.name		= "timer",

		.channels[0]	= S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,

		.channels[2]	= S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,

		.channels[3]	= S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,

	},

	[DMACH_I2S_IN] = {

		.name		= "i2s-sdi",

		.channels[1]	= S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,

		.channels[2]	= S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,

	},

	[DMACH_I2S_OUT] = {

		.name		= "i2s-sdo",

		.channels[2]	= S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,

	},

	[DMACH_USB_EP1] = {

		.name		= "usb-ep1",

		.channels[0]	= S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,

	},

	[DMACH_USB_EP2] = {

		.name		= "usb-ep2",

		.channels[1]	= S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,

	},

	[DMACH_USB_EP3] = {

		.name		= "usb-ep3",

		.channels[2]	= S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,

	},

	[DMACH_USB_EP4] = {

		.name		= "usb-ep4",

		.channels[3]	=S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,

	},

};



static void s3c2410_dma_select(struct s3c2410_dma_chan *chan,

			       struct s3c24xx_dma_map *map)

{

	chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;

}



static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel = {

	.select		= s3c2410_dma_select,

	.dcon_mask	= 7 << 24,

	.map		= s3c2410_dma_mappings,

	.map_size	= ARRAY_SIZE(s3c2410_dma_mappings),

};



static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {

	.channels	= {

		[DMACH_SDI]	= {

			.list	= {

				[0]	= 3 | DMA_CH_VALID,

				[1]	= 2 | DMA_CH_VALID,

				[2]	= 0 | DMA_CH_VALID,

			},

		},

		[DMACH_I2S_IN]	= {

			.list	= {

				[0]	= 1 | DMA_CH_VALID,

				[1]	= 2 | DMA_CH_VALID,

			},

		},

	},

};



static int __init s3c2410_dma_add(struct device *dev,

				  struct subsys_interface *sif)

{

	s3c2410_dma_init();

	s3c24xx_dma_order_set(&s3c2410_dma_order);

	return s3c24xx_dma_init_map(&s3c2410_dma_sel);

}



#if defined(CONFIG_CPU_S3C2410)

static struct subsys_interface s3c2410_dma_interface = {

	.name		= "s3c2410_dma",

	.subsys		= &s3c2410_subsys,

	.add_dev	= s3c2410_dma_add,

};



static int __init s3c2410_dma_drvinit(void)

{

	return subsys_interface_register(&s3c2410_dma_interface);

}



arch_initcall(s3c2410_dma_drvinit);



static struct subsys_interface s3c2410a_dma_interface = {

	.name		= "s3c2410a_dma",

	.subsys		= &s3c2410a_subsys,

	.add_dev	= s3c2410_dma_add,

};



static int __init s3c2410a_dma_drvinit(void)

{

	return subsys_interface_register(&s3c2410a_dma_interface);

}



arch_initcall(s3c2410a_dma_drvinit);

#endif



#if defined(CONFIG_CPU_S3C2442)

/* S3C2442 DMA contains the same selection table as the S3C2410 */

static struct subsys_interface s3c2442_dma_interface = {

	.name		= "s3c2442_dma",

	.subsys		= &s3c2442_subsys,

	.add_dev	= s3c2410_dma_add,

};



static int __init s3c2442_dma_drvinit(void)

{

	return subsys_interface_register(&s3c2442_dma_interface);

}



arch_initcall(s3c2442_dma_drvinit);

#endif