Loading arch/arm64/boot/dts/qcom/sdm670.dtsi +112 −0 Original line number Diff line number Diff line Loading @@ -681,6 +681,118 @@ "l3-scu-faultirq"; }; qcom,ipc-spinlock@1f40000 { compatible = "qcom,ipc-spinlock-sfpb"; reg = <0x1f40000 0x8000>; qcom,num-locks = <8>; }; qcom,smem@86000000 { compatible = "qcom,smem"; reg = <0x86000000 0x200000>, <0x17911008 0x4>, <0x778000 0x7000>, <0x1fd4000 0x8>; reg-names = "smem", "irq-reg-base", "aux-mem1", "smem_targ_info_reg"; qcom,mpu-enabled; }; qcom,glink-smem-native-xprt-modem@86000000 { compatible = "qcom,glink-smem-native-xprt"; reg = <0x86000000 0x200000>, <0x1799000c 0x4>; reg-names = "smem", "irq-reg-base"; qcom,irq-mask = <0x1000>; interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; label = "mpss"; }; qcom,glink-smem-native-xprt-adsp@86000000 { compatible = "qcom,glink-smem-native-xprt"; reg = <0x86000000 0x200000>, <0x1799000c 0x4>; reg-names = "smem", "irq-reg-base"; qcom,irq-mask = <0x100>; interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; label = "lpass"; qcom,qos-config = <&glink_qos_adsp>; qcom,ramp-time = <0xaf>; }; glink_qos_adsp: qcom,glink-qos-config-adsp { compatible = "qcom,glink-qos-config"; qcom,flow-info = <0x3c 0x0>, <0x3c 0x0>, <0x3c 0x0>, <0x3c 0x0>; qcom,mtu-size = <0x800>; qcom,tput-stats-cycle = <0xa>; }; glink_spi_xprt_wdsp: qcom,glink-spi-xprt-wdsp { compatible = "qcom,glink-spi-xprt"; label = "wdsp"; qcom,remote-fifo-config = <&glink_fifo_wdsp>; qcom,qos-config = <&glink_qos_wdsp>; qcom,ramp-time = <0x10>, <0x20>, <0x30>, <0x40>; }; glink_fifo_wdsp: qcom,glink-fifo-config-wdsp { compatible = "qcom,glink-fifo-config"; qcom,out-read-idx-reg = <0x12000>; qcom,out-write-idx-reg = <0x12004>; qcom,in-read-idx-reg = <0x1200C>; qcom,in-write-idx-reg = <0x12010>; }; glink_qos_wdsp: qcom,glink-qos-config-wdsp { compatible = "qcom,glink-qos-config"; qcom,flow-info = <0x80 0x0>, <0x70 0x1>, <0x60 0x2>, <0x50 0x3>; qcom,mtu-size = <0x800>; qcom,tput-stats-cycle = <0xa>; }; qcom,glink-smem-native-xprt-cdsp@86000000 { compatible = "qcom,glink-smem-native-xprt"; reg = <0x86000000 0x200000>, <0x1799000c 0x4>; reg-names = "smem", "irq-reg-base"; qcom,irq-mask = <0x10>; interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>; label = "cdsp"; }; glink_mpss: qcom,glink-ssr-modem { compatible = "qcom,glink_ssr"; label = "modem"; qcom,edge = "mpss"; qcom,notify-edges = <&glink_lpass>, <&glink_cdsp>; qcom,xprt = "smem"; }; glink_lpass: qcom,glink-ssr-adsp { compatible = "qcom,glink_ssr"; label = "adsp"; qcom,edge = "lpass"; qcom,notify-edges = <&glink_mpss>, <&glink_cdsp>; qcom,xprt = "smem"; }; glink_cdsp: qcom,glink-ssr-cdsp { compatible = "qcom,glink_ssr"; label = "cdsp"; qcom,edge = "cdsp"; qcom,notify-edges = <&glink_mpss>, <&glink_lpass>; qcom,xprt = "smem"; }; qcom,chd_sliver { compatible = "qcom,core-hang-detect"; label = "silver"; Loading Loading
arch/arm64/boot/dts/qcom/sdm670.dtsi +112 −0 Original line number Diff line number Diff line Loading @@ -681,6 +681,118 @@ "l3-scu-faultirq"; }; qcom,ipc-spinlock@1f40000 { compatible = "qcom,ipc-spinlock-sfpb"; reg = <0x1f40000 0x8000>; qcom,num-locks = <8>; }; qcom,smem@86000000 { compatible = "qcom,smem"; reg = <0x86000000 0x200000>, <0x17911008 0x4>, <0x778000 0x7000>, <0x1fd4000 0x8>; reg-names = "smem", "irq-reg-base", "aux-mem1", "smem_targ_info_reg"; qcom,mpu-enabled; }; qcom,glink-smem-native-xprt-modem@86000000 { compatible = "qcom,glink-smem-native-xprt"; reg = <0x86000000 0x200000>, <0x1799000c 0x4>; reg-names = "smem", "irq-reg-base"; qcom,irq-mask = <0x1000>; interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; label = "mpss"; }; qcom,glink-smem-native-xprt-adsp@86000000 { compatible = "qcom,glink-smem-native-xprt"; reg = <0x86000000 0x200000>, <0x1799000c 0x4>; reg-names = "smem", "irq-reg-base"; qcom,irq-mask = <0x100>; interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; label = "lpass"; qcom,qos-config = <&glink_qos_adsp>; qcom,ramp-time = <0xaf>; }; glink_qos_adsp: qcom,glink-qos-config-adsp { compatible = "qcom,glink-qos-config"; qcom,flow-info = <0x3c 0x0>, <0x3c 0x0>, <0x3c 0x0>, <0x3c 0x0>; qcom,mtu-size = <0x800>; qcom,tput-stats-cycle = <0xa>; }; glink_spi_xprt_wdsp: qcom,glink-spi-xprt-wdsp { compatible = "qcom,glink-spi-xprt"; label = "wdsp"; qcom,remote-fifo-config = <&glink_fifo_wdsp>; qcom,qos-config = <&glink_qos_wdsp>; qcom,ramp-time = <0x10>, <0x20>, <0x30>, <0x40>; }; glink_fifo_wdsp: qcom,glink-fifo-config-wdsp { compatible = "qcom,glink-fifo-config"; qcom,out-read-idx-reg = <0x12000>; qcom,out-write-idx-reg = <0x12004>; qcom,in-read-idx-reg = <0x1200C>; qcom,in-write-idx-reg = <0x12010>; }; glink_qos_wdsp: qcom,glink-qos-config-wdsp { compatible = "qcom,glink-qos-config"; qcom,flow-info = <0x80 0x0>, <0x70 0x1>, <0x60 0x2>, <0x50 0x3>; qcom,mtu-size = <0x800>; qcom,tput-stats-cycle = <0xa>; }; qcom,glink-smem-native-xprt-cdsp@86000000 { compatible = "qcom,glink-smem-native-xprt"; reg = <0x86000000 0x200000>, <0x1799000c 0x4>; reg-names = "smem", "irq-reg-base"; qcom,irq-mask = <0x10>; interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>; label = "cdsp"; }; glink_mpss: qcom,glink-ssr-modem { compatible = "qcom,glink_ssr"; label = "modem"; qcom,edge = "mpss"; qcom,notify-edges = <&glink_lpass>, <&glink_cdsp>; qcom,xprt = "smem"; }; glink_lpass: qcom,glink-ssr-adsp { compatible = "qcom,glink_ssr"; label = "adsp"; qcom,edge = "lpass"; qcom,notify-edges = <&glink_mpss>, <&glink_cdsp>; qcom,xprt = "smem"; }; glink_cdsp: qcom,glink-ssr-cdsp { compatible = "qcom,glink_ssr"; label = "cdsp"; qcom,edge = "cdsp"; qcom,notify-edges = <&glink_mpss>, <&glink_lpass>; qcom,xprt = "smem"; }; qcom,chd_sliver { compatible = "qcom,core-hang-detect"; label = "silver"; Loading