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Commit d4e583ab authored by Dhaval Patel's avatar Dhaval Patel Committed by Gerrit - the friendly Code Review server
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drm/msm/sde: reset vsync and underrun cnt only during init 



Reset vysnc and underrun count only during encoder
initialization phase instead of enable/disable to avoid
reading it zero. An encoder client needs to read
the counter before using encoder and after using it to
find the underrun counter or number of update during
cycle.

Change-Id: I96eaeb10014cabb61ddebb4676b4bb54be6dfa59
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent da755693

drivers/gpu/drm/msm/sde/sde_encoder.c

+9 −3
Original line number Diff line number Diff line
@@ -404,9 +404,6 @@ static void sde_encoder_virt_enable(struct drm_encoder *drm_enc) 
		struct sde_encoder_phys *phys = sde_enc->phys_encs[i];



		if (phys) {

			atomic_set(&phys->vsync_cnt, 0);

			atomic_set(&phys->underrun_cnt, 0);



			if (phys->ops.is_master && phys->ops.is_master(phys)) {

				SDE_DEBUG_ENC(sde_enc,

						"master is now idx %d\n", i);
@@ -1317,6 +1314,15 @@ static int sde_encoder_setup_display(struct sde_encoder_virt *sde_enc, 
						"failed to add phys encs\n");

		}

	}



	for (i = 0; i < sde_enc->num_phys_encs; i++) {

		struct sde_encoder_phys *phys = sde_enc->phys_encs[i];



		if (phys) {

			atomic_set(&phys->vsync_cnt, 0);

			atomic_set(&phys->underrun_cnt, 0);

		}

	}

	mutex_unlock(&sde_enc->enc_lock);



	return ret;