Loading drivers/gpu/drm/nouveau/Makefile +5 −1 Original line number Diff line number Diff line Loading @@ -33,6 +33,7 @@ nouveau-y += core/subdev/bios/dp.o nouveau-y += core/subdev/bios/gpio.o nouveau-y += core/subdev/bios/i2c.o nouveau-y += core/subdev/bios/init.o nouveau-y += core/subdev/bios/mxm.o nouveau-y += core/subdev/bios/pll.o nouveau-y += core/subdev/clock/nv04.o nouveau-y += core/subdev/clock/nv40.o Loading Loading @@ -83,6 +84,9 @@ nouveau-y += core/subdev/mc/nv44.o nouveau-y += core/subdev/mc/nv50.o nouveau-y += core/subdev/mc/nv98.o nouveau-y += core/subdev/mc/nvc0.o nouveau-y += core/subdev/mxm/base.o nouveau-y += core/subdev/mxm/mxms.o nouveau-y += core/subdev/mxm/nv50.o nouveau-y += core/subdev/timer/base.o nouveau-y += core/subdev/timer/nv04.o nouveau-y += core/subdev/vm/base.o Loading Loading @@ -172,7 +176,7 @@ nouveau-y += nouveau_drv.o nouveau_state.o nouveau_irq.o nouveau-y += nouveau_prime.o # drm/kms/bios nouveau-y += nouveau_mxm.o nouveau_bios.o nouveau-y += nouveau_bios.o # drm/kms/common nouveau-y += nouveau_display.o nouveau_connector.o Loading drivers/gpu/drm/nouveau/core/include/subdev/bios/mxm.h 0 → 100644 +9 −0 Original line number Diff line number Diff line #ifndef __NVBIOS_MXM_H__ #define __NVBIOS_MXM_H__ u16 mxm_table(struct nouveau_bios *, u8 *ver, u8 *hdr); u8 mxm_sor_map(struct nouveau_bios *, u8 conn); u8 mxm_ddc_map(struct nouveau_bios *, u8 port); #endif drivers/gpu/drm/nouveau/core/include/subdev/mxm.h 0 → 100644 +37 −0 Original line number Diff line number Diff line #ifndef __NOUVEAU_MXM_H__ #define __NOUVEAU_MXM_H__ #include <core/subdev.h> #include <core/device.h> #define MXM_SANITISE_DCB 0x00000001 struct nouveau_mxm { struct nouveau_subdev base; u32 action; u8 *mxms; }; static inline struct nouveau_mxm * nouveau_mxm(void *obj) { return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_MXM]; } #define nouveau_mxm_create(p,e,o,d) \ nouveau_mxm_create_((p), (e), (o), sizeof(**d), (void **)d) #define nouveau_mxm_init(p) \ nouveau_subdev_init(&(p)->base) #define nouveau_mxm_fini(p,s) \ nouveau_subdev_fini(&(p)->base, (s)) int nouveau_mxm_create_(struct nouveau_object *, struct nouveau_object *, struct nouveau_oclass *, int, void **); void nouveau_mxm_destroy(struct nouveau_mxm *); #define _nouveau_mxm_dtor _nouveau_subdev_dtor #define _nouveau_mxm_init _nouveau_subdev_init #define _nouveau_mxm_fini _nouveau_subdev_fini extern struct nouveau_oclass nv50_mxm_oclass; #endif drivers/gpu/drm/nouveau/core/os.h +0 −2 Original line number Diff line number Diff line Loading @@ -19,8 +19,6 @@ #include <asm/unaligned.h> #include <asm/unaligned.h> static inline int ffsll(u64 mask) { Loading drivers/gpu/drm/nouveau/core/subdev/bios/mxm.c 0 → 100644 +135 −0 Original line number Diff line number Diff line /* * Copyright 2012 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs */ #include <subdev/bios.h> #include <subdev/bios/bit.h> #include <subdev/bios/mxm.h> u16 mxm_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr) { struct bit_entry x; if (bit_entry(bios, 'x', &x)) { nv_debug(bios, "BIT 'x' table not present\n"); return 0x0000; } *ver = x.version; *hdr = x.length; if (*ver != 1 || *hdr < 3) { nv_warn(bios, "BIT 'x' table %d/%d unknown\n", *ver, *hdr); return 0x0000; } return x.offset; } /* These map MXM v2.x digital connection values to the appropriate SOR/link, * hopefully they're correct for all boards within the same chipset... * * MXM v3.x VBIOS are nicer and provide pointers to these tables. */ static u8 nv84_sor_map[16] = { 0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; static u8 nv92_sor_map[16] = { 0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31, 0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; static u8 nv94_sor_map[16] = { 0x00, 0x14, 0x24, 0x11, 0x34, 0x31, 0x11, 0x31, 0x11, 0x31, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00 }; static u8 nv98_sor_map[16] = { 0x00, 0x14, 0x12, 0x11, 0x00, 0x31, 0x11, 0x31, 0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; u8 mxm_sor_map(struct nouveau_bios *bios, u8 conn) { u8 ver, hdr; u16 mxm = mxm_table(bios, &ver, &hdr); if (mxm && hdr >= 6) { u16 map = nv_ro16(bios, mxm + 4); if (map) { ver = nv_ro08(bios, map); if (ver == 0x10) { if (conn < nv_ro08(bios, map + 3)) { map += nv_ro08(bios, map + 1); map += conn; return nv_ro08(bios, map); } return 0x00; } nv_warn(bios, "unknown sor map v%02x\n", ver); } } if (bios->version.chip == 0x84 || bios->version.chip == 0x86) return nv84_sor_map[conn]; if (bios->version.chip == 0x92) return nv92_sor_map[conn]; if (bios->version.chip == 0x94 || bios->version.chip == 0x96) return nv94_sor_map[conn]; if (bios->version.chip == 0x98) return nv98_sor_map[conn]; nv_warn(bios, "missing sor map\n"); return 0x00; } u8 mxm_ddc_map(struct nouveau_bios *bios, u8 port) { u8 ver, hdr; u16 mxm = mxm_table(bios, &ver, &hdr); if (mxm && hdr >= 8) { u16 map = nv_ro16(bios, mxm + 6); if (map) { ver = nv_ro08(bios, map); if (ver == 0x10) { if (port < nv_ro08(bios, map + 3)) { map += nv_ro08(bios, map + 1); map += port; return nv_ro08(bios, map); } return 0x00; } nv_warn(bios, "unknown ddc map v%02x\n", ver); } } /* v2.x: directly write port as dcb i2cidx */ return (port << 4) | port; } Loading
drivers/gpu/drm/nouveau/Makefile +5 −1 Original line number Diff line number Diff line Loading @@ -33,6 +33,7 @@ nouveau-y += core/subdev/bios/dp.o nouveau-y += core/subdev/bios/gpio.o nouveau-y += core/subdev/bios/i2c.o nouveau-y += core/subdev/bios/init.o nouveau-y += core/subdev/bios/mxm.o nouveau-y += core/subdev/bios/pll.o nouveau-y += core/subdev/clock/nv04.o nouveau-y += core/subdev/clock/nv40.o Loading Loading @@ -83,6 +84,9 @@ nouveau-y += core/subdev/mc/nv44.o nouveau-y += core/subdev/mc/nv50.o nouveau-y += core/subdev/mc/nv98.o nouveau-y += core/subdev/mc/nvc0.o nouveau-y += core/subdev/mxm/base.o nouveau-y += core/subdev/mxm/mxms.o nouveau-y += core/subdev/mxm/nv50.o nouveau-y += core/subdev/timer/base.o nouveau-y += core/subdev/timer/nv04.o nouveau-y += core/subdev/vm/base.o Loading Loading @@ -172,7 +176,7 @@ nouveau-y += nouveau_drv.o nouveau_state.o nouveau_irq.o nouveau-y += nouveau_prime.o # drm/kms/bios nouveau-y += nouveau_mxm.o nouveau_bios.o nouveau-y += nouveau_bios.o # drm/kms/common nouveau-y += nouveau_display.o nouveau_connector.o Loading
drivers/gpu/drm/nouveau/core/include/subdev/bios/mxm.h 0 → 100644 +9 −0 Original line number Diff line number Diff line #ifndef __NVBIOS_MXM_H__ #define __NVBIOS_MXM_H__ u16 mxm_table(struct nouveau_bios *, u8 *ver, u8 *hdr); u8 mxm_sor_map(struct nouveau_bios *, u8 conn); u8 mxm_ddc_map(struct nouveau_bios *, u8 port); #endif
drivers/gpu/drm/nouveau/core/include/subdev/mxm.h 0 → 100644 +37 −0 Original line number Diff line number Diff line #ifndef __NOUVEAU_MXM_H__ #define __NOUVEAU_MXM_H__ #include <core/subdev.h> #include <core/device.h> #define MXM_SANITISE_DCB 0x00000001 struct nouveau_mxm { struct nouveau_subdev base; u32 action; u8 *mxms; }; static inline struct nouveau_mxm * nouveau_mxm(void *obj) { return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_MXM]; } #define nouveau_mxm_create(p,e,o,d) \ nouveau_mxm_create_((p), (e), (o), sizeof(**d), (void **)d) #define nouveau_mxm_init(p) \ nouveau_subdev_init(&(p)->base) #define nouveau_mxm_fini(p,s) \ nouveau_subdev_fini(&(p)->base, (s)) int nouveau_mxm_create_(struct nouveau_object *, struct nouveau_object *, struct nouveau_oclass *, int, void **); void nouveau_mxm_destroy(struct nouveau_mxm *); #define _nouveau_mxm_dtor _nouveau_subdev_dtor #define _nouveau_mxm_init _nouveau_subdev_init #define _nouveau_mxm_fini _nouveau_subdev_fini extern struct nouveau_oclass nv50_mxm_oclass; #endif
drivers/gpu/drm/nouveau/core/os.h +0 −2 Original line number Diff line number Diff line Loading @@ -19,8 +19,6 @@ #include <asm/unaligned.h> #include <asm/unaligned.h> static inline int ffsll(u64 mask) { Loading
drivers/gpu/drm/nouveau/core/subdev/bios/mxm.c 0 → 100644 +135 −0 Original line number Diff line number Diff line /* * Copyright 2012 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs */ #include <subdev/bios.h> #include <subdev/bios/bit.h> #include <subdev/bios/mxm.h> u16 mxm_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr) { struct bit_entry x; if (bit_entry(bios, 'x', &x)) { nv_debug(bios, "BIT 'x' table not present\n"); return 0x0000; } *ver = x.version; *hdr = x.length; if (*ver != 1 || *hdr < 3) { nv_warn(bios, "BIT 'x' table %d/%d unknown\n", *ver, *hdr); return 0x0000; } return x.offset; } /* These map MXM v2.x digital connection values to the appropriate SOR/link, * hopefully they're correct for all boards within the same chipset... * * MXM v3.x VBIOS are nicer and provide pointers to these tables. */ static u8 nv84_sor_map[16] = { 0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; static u8 nv92_sor_map[16] = { 0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31, 0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; static u8 nv94_sor_map[16] = { 0x00, 0x14, 0x24, 0x11, 0x34, 0x31, 0x11, 0x31, 0x11, 0x31, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00 }; static u8 nv98_sor_map[16] = { 0x00, 0x14, 0x12, 0x11, 0x00, 0x31, 0x11, 0x31, 0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; u8 mxm_sor_map(struct nouveau_bios *bios, u8 conn) { u8 ver, hdr; u16 mxm = mxm_table(bios, &ver, &hdr); if (mxm && hdr >= 6) { u16 map = nv_ro16(bios, mxm + 4); if (map) { ver = nv_ro08(bios, map); if (ver == 0x10) { if (conn < nv_ro08(bios, map + 3)) { map += nv_ro08(bios, map + 1); map += conn; return nv_ro08(bios, map); } return 0x00; } nv_warn(bios, "unknown sor map v%02x\n", ver); } } if (bios->version.chip == 0x84 || bios->version.chip == 0x86) return nv84_sor_map[conn]; if (bios->version.chip == 0x92) return nv92_sor_map[conn]; if (bios->version.chip == 0x94 || bios->version.chip == 0x96) return nv94_sor_map[conn]; if (bios->version.chip == 0x98) return nv98_sor_map[conn]; nv_warn(bios, "missing sor map\n"); return 0x00; } u8 mxm_ddc_map(struct nouveau_bios *bios, u8 port) { u8 ver, hdr; u16 mxm = mxm_table(bios, &ver, &hdr); if (mxm && hdr >= 8) { u16 map = nv_ro16(bios, mxm + 6); if (map) { ver = nv_ro08(bios, map); if (ver == 0x10) { if (port < nv_ro08(bios, map + 3)) { map += nv_ro08(bios, map + 1); map += port; return nv_ro08(bios, map); } return 0x00; } nv_warn(bios, "unknown ddc map v%02x\n", ver); } } /* v2.x: directly write port as dcb i2cidx */ return (port << 4) | port; }