Loading lib/mpi/longlong.h +12 −12 Original line number Original line Diff line number Diff line Loading @@ -176,8 +176,8 @@ extern UDItype __udiv_qrnnd(UDItype *, UDItype, UDItype, UDItype); #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ __asm__ ("adds %1, %4, %5\n" \ __asm__ ("adds %1, %4, %5\n" \ "adc %0, %2, %3" \ "adc %0, %2, %3" \ : "=r" ((USItype)(sh)), \ : "=r" (sh), \ "=&r" ((USItype)(sl)) \ "=&r" (sl) \ : "%r" ((USItype)(ah)), \ : "%r" ((USItype)(ah)), \ "rI" ((USItype)(bh)), \ "rI" ((USItype)(bh)), \ "%r" ((USItype)(al)), \ "%r" ((USItype)(al)), \ Loading @@ -185,15 +185,15 @@ extern UDItype __udiv_qrnnd(UDItype *, UDItype, UDItype, UDItype); #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ __asm__ ("subs %1, %4, %5\n" \ __asm__ ("subs %1, %4, %5\n" \ "sbc %0, %2, %3" \ "sbc %0, %2, %3" \ : "=r" ((USItype)(sh)), \ : "=r" (sh), \ "=&r" ((USItype)(sl)) \ "=&r" (sl) \ : "r" ((USItype)(ah)), \ : "r" ((USItype)(ah)), \ "rI" ((USItype)(bh)), \ "rI" ((USItype)(bh)), \ "r" ((USItype)(al)), \ "r" ((USItype)(al)), \ "rI" ((USItype)(bl))) "rI" ((USItype)(bl))) #if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__ #if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__ #define umul_ppmm(xh, xl, a, b) \ #define umul_ppmm(xh, xl, a, b) \ __asm__ ("%@ Inlined umul_ppmm\n" \ __asm__ ("@ Inlined umul_ppmm\n" \ "mov %|r0, %2, lsr #16 @ AAAA\n" \ "mov %|r0, %2, lsr #16 @ AAAA\n" \ "mov %|r2, %3, lsr #16 @ BBBB\n" \ "mov %|r2, %3, lsr #16 @ BBBB\n" \ "bic %|r1, %2, %|r0, lsl #16 @ aaaa\n" \ "bic %|r1, %2, %|r0, lsl #16 @ aaaa\n" \ Loading @@ -206,17 +206,17 @@ extern UDItype __udiv_qrnnd(UDItype *, UDItype, UDItype, UDItype); "addcs %|r2, %|r2, #65536\n" \ "addcs %|r2, %|r2, #65536\n" \ "adds %1, %|r1, %|r0, lsl #16\n" \ "adds %1, %|r1, %|r0, lsl #16\n" \ "adc %0, %|r2, %|r0, lsr #16" \ "adc %0, %|r2, %|r0, lsr #16" \ : "=&r" ((USItype)(xh)), \ : "=&r" (xh), \ "=r" ((USItype)(xl)) \ "=r" (xl) \ : "r" ((USItype)(a)), \ : "r" ((USItype)(a)), \ "r" ((USItype)(b)) \ "r" ((USItype)(b)) \ : "r0", "r1", "r2") : "r0", "r1", "r2") #else #else #define umul_ppmm(xh, xl, a, b) \ #define umul_ppmm(xh, xl, a, b) \ __asm__ ("%@ Inlined umul_ppmm\n" \ __asm__ ("@ Inlined umul_ppmm\n" \ "umull %r1, %r0, %r2, %r3" \ "umull %1, %0, %2, %3" \ : "=&r" ((USItype)(xh)), \ : "=&r" (xh), \ "=&r" ((USItype)(xl)) \ "=&r" (xl) \ : "r" ((USItype)(a)), \ : "r" ((USItype)(a)), \ "r" ((USItype)(b)) \ "r" ((USItype)(b)) \ : "r0", "r1") : "r0", "r1") Loading Loading
lib/mpi/longlong.h +12 −12 Original line number Original line Diff line number Diff line Loading @@ -176,8 +176,8 @@ extern UDItype __udiv_qrnnd(UDItype *, UDItype, UDItype, UDItype); #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ __asm__ ("adds %1, %4, %5\n" \ __asm__ ("adds %1, %4, %5\n" \ "adc %0, %2, %3" \ "adc %0, %2, %3" \ : "=r" ((USItype)(sh)), \ : "=r" (sh), \ "=&r" ((USItype)(sl)) \ "=&r" (sl) \ : "%r" ((USItype)(ah)), \ : "%r" ((USItype)(ah)), \ "rI" ((USItype)(bh)), \ "rI" ((USItype)(bh)), \ "%r" ((USItype)(al)), \ "%r" ((USItype)(al)), \ Loading @@ -185,15 +185,15 @@ extern UDItype __udiv_qrnnd(UDItype *, UDItype, UDItype, UDItype); #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ __asm__ ("subs %1, %4, %5\n" \ __asm__ ("subs %1, %4, %5\n" \ "sbc %0, %2, %3" \ "sbc %0, %2, %3" \ : "=r" ((USItype)(sh)), \ : "=r" (sh), \ "=&r" ((USItype)(sl)) \ "=&r" (sl) \ : "r" ((USItype)(ah)), \ : "r" ((USItype)(ah)), \ "rI" ((USItype)(bh)), \ "rI" ((USItype)(bh)), \ "r" ((USItype)(al)), \ "r" ((USItype)(al)), \ "rI" ((USItype)(bl))) "rI" ((USItype)(bl))) #if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__ #if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__ #define umul_ppmm(xh, xl, a, b) \ #define umul_ppmm(xh, xl, a, b) \ __asm__ ("%@ Inlined umul_ppmm\n" \ __asm__ ("@ Inlined umul_ppmm\n" \ "mov %|r0, %2, lsr #16 @ AAAA\n" \ "mov %|r0, %2, lsr #16 @ AAAA\n" \ "mov %|r2, %3, lsr #16 @ BBBB\n" \ "mov %|r2, %3, lsr #16 @ BBBB\n" \ "bic %|r1, %2, %|r0, lsl #16 @ aaaa\n" \ "bic %|r1, %2, %|r0, lsl #16 @ aaaa\n" \ Loading @@ -206,17 +206,17 @@ extern UDItype __udiv_qrnnd(UDItype *, UDItype, UDItype, UDItype); "addcs %|r2, %|r2, #65536\n" \ "addcs %|r2, %|r2, #65536\n" \ "adds %1, %|r1, %|r0, lsl #16\n" \ "adds %1, %|r1, %|r0, lsl #16\n" \ "adc %0, %|r2, %|r0, lsr #16" \ "adc %0, %|r2, %|r0, lsr #16" \ : "=&r" ((USItype)(xh)), \ : "=&r" (xh), \ "=r" ((USItype)(xl)) \ "=r" (xl) \ : "r" ((USItype)(a)), \ : "r" ((USItype)(a)), \ "r" ((USItype)(b)) \ "r" ((USItype)(b)) \ : "r0", "r1", "r2") : "r0", "r1", "r2") #else #else #define umul_ppmm(xh, xl, a, b) \ #define umul_ppmm(xh, xl, a, b) \ __asm__ ("%@ Inlined umul_ppmm\n" \ __asm__ ("@ Inlined umul_ppmm\n" \ "umull %r1, %r0, %r2, %r3" \ "umull %1, %0, %2, %3" \ : "=&r" ((USItype)(xh)), \ : "=&r" (xh), \ "=&r" ((USItype)(xl)) \ "=&r" (xl) \ : "r" ((USItype)(a)), \ : "r" ((USItype)(a)), \ "r" ((USItype)(b)) \ "r" ((USItype)(b)) \ : "r0", "r1") : "r0", "r1") Loading