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Commit d0418894 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: switch get_gpu_clock() to a callback (v2) 



Cleans up the code for future asics

v2: rebase, fix some missing radeon_asic updates

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 454d2e2a

drivers/gpu/drm/radeon/r600.c

+2 −2
Original line number Diff line number Diff line
@@ -4461,14 +4461,14 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev) 
}



/**

 * r600_get_gpu_clock - return GPU clock counter snapshot

 * r600_get_gpu_clock_counter - return GPU clock counter snapshot

 *

 * @rdev: radeon_device pointer

 *

 * Fetches a GPU clock counter snapshot (R6xx-cayman).

 * Returns the 64 bit clock counter snapshot.

 */

uint64_t r600_get_gpu_clock(struct radeon_device *rdev)

uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev)

{

	uint64_t clock;

drivers/gpu/drm/radeon/radeon.h

+3 −0
Original line number Diff line number Diff line
@@ -1181,6 +1181,8 @@ struct radeon_asic { 
	int (*mc_wait_for_idle)(struct radeon_device *rdev);

	/* get the reference clock */

	u32 (*get_xclk)(struct radeon_device *rdev);

	/* get the gpu clock counter */

	uint64_t (*get_gpu_clock_counter)(struct radeon_device *rdev);

	/* gart */

	struct {

		void (*tlb_flush)(struct radeon_device *rdev);
@@ -1863,6 +1865,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); 
#define radeon_wait_for_vblank(rdev, crtc) (rdev)->asic->display.wait_for_vblank((rdev), (crtc))

#define radeon_mc_wait_for_idle(rdev) (rdev)->asic->mc_wait_for_idle((rdev))

#define radeon_get_xclk(rdev) (rdev)->asic->get_xclk((rdev))

#define radeon_get_gpu_clock_counter(rdev) (rdev)->asic->get_gpu_clock_counter((rdev))



/* Common functions */

/* AGP */

drivers/gpu/drm/radeon/radeon_asic.c

+9 −0
Original line number Diff line number Diff line
@@ -935,6 +935,7 @@ static struct radeon_asic r600_asic = { 
	.gui_idle = &r600_gui_idle,

	.mc_wait_for_idle = &r600_mc_wait_for_idle,

	.get_xclk = &r600_get_xclk,

	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,

	.gart = {

		.tlb_flush = &r600_pcie_gart_tlb_flush,

		.set_page = &rs600_gart_set_page,
@@ -1020,6 +1021,7 @@ static struct radeon_asic rs780_asic = { 
	.gui_idle = &r600_gui_idle,

	.mc_wait_for_idle = &r600_mc_wait_for_idle,

	.get_xclk = &r600_get_xclk,

	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,

	.gart = {

		.tlb_flush = &r600_pcie_gart_tlb_flush,

		.set_page = &rs600_gart_set_page,
@@ -1105,6 +1107,7 @@ static struct radeon_asic rv770_asic = { 
	.gui_idle = &r600_gui_idle,

	.mc_wait_for_idle = &r600_mc_wait_for_idle,

	.get_xclk = &rv770_get_xclk,

	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,

	.gart = {

		.tlb_flush = &r600_pcie_gart_tlb_flush,

		.set_page = &rs600_gart_set_page,
@@ -1190,6 +1193,7 @@ static struct radeon_asic evergreen_asic = { 
	.gui_idle = &r600_gui_idle,

	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,

	.get_xclk = &rv770_get_xclk,

	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,

	.gart = {

		.tlb_flush = &evergreen_pcie_gart_tlb_flush,

		.set_page = &rs600_gart_set_page,
@@ -1275,6 +1279,7 @@ static struct radeon_asic sumo_asic = { 
	.gui_idle = &r600_gui_idle,

	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,

	.get_xclk = &r600_get_xclk,

	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,

	.gart = {

		.tlb_flush = &evergreen_pcie_gart_tlb_flush,

		.set_page = &rs600_gart_set_page,
@@ -1360,6 +1365,7 @@ static struct radeon_asic btc_asic = { 
	.gui_idle = &r600_gui_idle,

	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,

	.get_xclk = &rv770_get_xclk,

	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,

	.gart = {

		.tlb_flush = &evergreen_pcie_gart_tlb_flush,

		.set_page = &rs600_gart_set_page,
@@ -1445,6 +1451,7 @@ static struct radeon_asic cayman_asic = { 
	.gui_idle = &r600_gui_idle,

	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,

	.get_xclk = &rv770_get_xclk,

	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,

	.gart = {

		.tlb_flush = &cayman_pcie_gart_tlb_flush,

		.set_page = &rs600_gart_set_page,
@@ -1573,6 +1580,7 @@ static struct radeon_asic trinity_asic = { 
	.gui_idle = &r600_gui_idle,

	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,

	.get_xclk = &r600_get_xclk,

	.get_gpu_clock_counter = &r600_get_gpu_clock_counter,

	.gart = {

		.tlb_flush = &cayman_pcie_gart_tlb_flush,

		.set_page = &rs600_gart_set_page,
@@ -1701,6 +1709,7 @@ static struct radeon_asic si_asic = { 
	.gui_idle = &r600_gui_idle,

	.mc_wait_for_idle = &evergreen_mc_wait_for_idle,

	.get_xclk = &si_get_xclk,

	.get_gpu_clock_counter = &si_get_gpu_clock_counter,

	.gart = {

		.tlb_flush = &si_pcie_gart_tlb_flush,

		.set_page = &rs600_gart_set_page,

drivers/gpu/drm/radeon/radeon_asic.h

+2 −2
Original line number Diff line number Diff line
@@ -389,8 +389,8 @@ void r600_kms_blit_copy(struct radeon_device *rdev, 
			unsigned num_gpu_pages,

			struct radeon_sa_bo *vb);

int r600_mc_wait_for_idle(struct radeon_device *rdev);

uint64_t r600_get_gpu_clock(struct radeon_device *rdev);

u32 r600_get_xclk(struct radeon_device *rdev);

uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev);



/*

 * rv770,rv730,rv710,rv740
@@ -517,12 +517,12 @@ void si_vm_set_page(struct radeon_device *rdev, 
		    uint32_t incr, uint32_t flags);

void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm);

int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);

uint64_t si_get_gpu_clock(struct radeon_device *rdev);

int si_copy_dma(struct radeon_device *rdev,

		uint64_t src_offset, uint64_t dst_offset,

		unsigned num_gpu_pages,

		struct radeon_fence **fence);

void si_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm);

u32 si_get_xclk(struct radeon_device *rdev);

uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev);



#endif

drivers/gpu/drm/radeon/radeon_kms.c

+1 −5
Original line number Diff line number Diff line
@@ -185,11 +185,7 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) 
	if (info->request == RADEON_INFO_TIMESTAMP) {

		if (rdev->family >= CHIP_R600) {

			value_ptr64 = (uint64_t*)((unsigned long)info->value);

			if (rdev->family >= CHIP_TAHITI) {

				value64 = si_get_gpu_clock(rdev);

			} else {

				value64 = r600_get_gpu_clock(rdev);

			}

			value64 = radeon_get_gpu_clock_counter(rdev);



			if (DRM_COPY_TO_USER(value_ptr64, &value64, sizeof(value64))) {

				DRM_ERROR("copy_to_user %s:%u\n", __func__, __LINE__);