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Commit cff00373 authored by Jingbiao Lu's avatar Jingbiao Lu
Browse files

ARM: dts: msm: add device tree support for msm8937 



Add device tree support for msm8937-pmi8950 MTP device.
This implementation is based on snapshot of the
msm8937 device tree from msm-3.18 commit 777fba3d04460
("Update target name references for MSM8937").

Change-Id: Ic1f85c301b272b564287db85ab83914388a633e6
Signed-off-by: default avatarJingbiao Lu <jingbiao@codeaurora.org>
parent 8234f1fd

arch/arm64/boot/dts/qcom/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -276,6 +276,8 @@ dtb-$(CONFIG_ARCH_MSM8953) += msm8953-cdp.dtb \ 
	msm8953-pmi8940-ext-codec-mtp.dtb \

	msm8953-pmi8937-ext-codec-mtp.dtb



dtb-$(CONFIG_ARCH_MSM8937) += msm8937-pmi8950-mtp.dtb



dtb-$(CONFIG_ARCH_SDM450) += sdm450-rcm.dtb \

	sdm450-cdp.dtb \

	sdm450-mtp.dtb \

arch/arm64/boot/dts/qcom/msm8937-cpu.dtsi

0 → 100644
+194 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2015-2016, 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



/ {

	psci {

		compatible = "arm,psci-1.0";

		method = "smc";

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;

		cpu-map {

			cluster0 {

				core0 {

					cpu = <&CPU4>;

				};

				core1 {

					cpu = <&CPU5>;

				};

				core2 {

					cpu = <&CPU6>;

				};

				core3 {

					cpu = <&CPU7>;

				};

			};



			cluster1 {

				core0 {

					cpu = <&CPU0>;

				};

				core1 {

					cpu = <&CPU1>;

				};

				core2 {

					cpu = <&CPU2>;

				};

				core3 {

					cpu = <&CPU3>;

				};

			};

		};



		CPU0: cpu@100 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x100>;

			enable-method = "psci";

			next-level-cache = <&L2_1>;

			L2_1: l2-cache {

			      compatible = "arm,arch-cache";

			      cache-level = <2>;

			      /* A53 L2 dump not supported */

			      qcom,dump-size = <0x0>;

			};

			L1_I_100: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};

			L1_D_100: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};

		};



		CPU1: cpu@101 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x101>;

			enable-method = "psci";

			next-level-cache = <&L2_1>;

			L1_I_101: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};

			L1_D_101: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};

		};



		CPU2: cpu@102 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x102>;

			enable-method = "psci";

			next-level-cache = <&L2_1>;

			L1_I_102: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};

			L1_D_102: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};

		};



		CPU3: cpu@103 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x103>;

			enable-method = "psci";

			next-level-cache = <&L2_1>;

			L1_I_103: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};

			L1_D_103: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};

		};



		CPU4: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x0>;

			enable-method = "psci";

			next-level-cache = <&L2_0>;

			L2_0: l2-cache {

			      compatible = "arm,arch-cache";

			      cache-level = <2>;

			      qcom,dump-size = <0x0>;

			};

			L1_I_0: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};

			L1_D_0: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};

		};



		CPU5: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x1>;

			enable-method = "psci";

			next-level-cache = <&L2_0>;

			L1_I_1: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};

			L1_D_1: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};

		};



		CPU6: cpu@2 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x2>;

			enable-method = "psci";

			next-level-cache = <&L2_0>;

			L1_I_2: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};

			L1_D_2: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};

		};



		CPU7: cpu@3 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x3>;

			enable-method = "psci";

			next-level-cache = <&L2_0>;

			L1_I_3: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

			};

			L1_D_3: l1-dcache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x9000>;

			};

		};

	};

};

arch/arm64/boot/dts/qcom/msm8937-ion.dtsi

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+37 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2015-2016, 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&soc {

	qcom,ion {

		compatible = "qcom,msm-ion";

		#address-cells = <1>;

		#size-cells = <0>;



		qcom,ion-heap@25 {

			reg = <25>;

			qcom,ion-heap-type = "SYSTEM";

		};



		qcom,ion-heap@8 { /* CP_MM HEAP */

			reg = <8>;

			memory-region = <&secure_mem>;

			qcom,ion-heap-type = "SECURE_DMA";

		};



		qcom,ion-heap@27 { /* QSEECOM HEAP */

			reg = <27>;

			memory-region = <&qseecom_mem>;

			qcom,ion-heap-type = "DMA";

		};

	};

};

arch/arm64/boot/dts/qcom/msm8937-mtp.dtsi

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+16 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2015-2016, 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&blsp1_uart2 {

	status = "ok";

};