Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ce88168f authored by Mark Brown's avatar Mark Brown
Browse files

ASoC: Fix offset of freqmode in WM8580 PLL configuration



Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
parent 516ef69f
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -522,7 +522,7 @@ static int wm8580_set_dai_pll(struct snd_soc_dai *codec_dai,
	reg = wm8580_read(codec, WM8580_PLLA4 + offset);
	reg &= ~0x3f;
	reg |= pll_div.prescale | pll_div.postscale << 1 |
		pll_div.freqmode << 4;
		pll_div.freqmode << 3;

	wm8580_write(codec, WM8580_PLLA4 + offset, reg);