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Commit ce0a3956 authored by Bruce Losure's avatar Bruce Losure Committed by Tony Luck
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[IA64-SGI] Altix patch to add bricktype knowledge to tiocx 



Here is a patch to enable the SGI tiocx bus driver to distingush between
FPGA-attached h/w and non-FPGA-attached h/w.

Signed-off-by: default avatarBruce Losure <blosure@sgi.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent ae40aae9

arch/ia64/sn/kernel/tiocx.c

+32 −9
Original line number Original line Diff line number Diff line
@@ -21,6 +21,8 @@ 
#include <asm/sn/types.h>

#include <asm/sn/types.h>

#include <asm/sn/shubio.h>

#include <asm/sn/shubio.h>

#include <asm/sn/tiocx.h>

#include <asm/sn/tiocx.h>

#include <asm/sn/l1.h>

#include <asm/sn/module.h>

#include "tio.h"

#include "tio.h"

#include "xtalk/xwidgetdev.h"

#include "xtalk/xwidgetdev.h"

#include "xtalk/hubdev.h"

#include "xtalk/hubdev.h"
@@ -308,14 +310,12 @@ void tiocx_irq_free(struct sn_irq_info *sn_irq_info) 
	}

	}

}

}





uint64_t

uint64_t tiocx_dma_addr(uint64_t addr)

tiocx_dma_addr(uint64_t addr)

{

{

	return PHYS_TO_TIODMA(addr);

	return PHYS_TO_TIODMA(addr);

}

}





uint64_t

uint64_t tiocx_swin_base(int nasid)

tiocx_swin_base(int nasid)

{

{

	return TIO_SWIN_BASE(nasid, TIOCX_CORELET);

	return TIO_SWIN_BASE(nasid, TIOCX_CORELET);

}

}
@@ -366,7 +366,29 @@ static void tio_corelet_reset(nasid_t nasid, int corelet) 
	udelay(2000);

	udelay(2000);

}

}





static int fpga_attached(nasid_t nasid)

static int tiocx_btchar_get(int nasid)

{

	moduleid_t module_id;

	geoid_t geoid;

	int cnodeid;



	cnodeid = nasid_to_cnodeid(nasid);

	geoid = cnodeid_get_geoid(cnodeid);

	module_id = geo_module(geoid);

	return MODULE_GET_BTCHAR(module_id);

}



static int is_fpga_brick(int nasid)

{

	switch (tiocx_btchar_get(nasid)) {

	case L1_BRICKTYPE_SA:

	case L1_BRICKTYPE_ATHENA:

		return 1;

	}

	return 0;

}



static int bitstream_loaded(nasid_t nasid)

{

{

	uint64_t cx_credits;

	uint64_t cx_credits;
@@ -383,7 +405,7 @@ static int tiocx_reload(struct cx_dev *cx_dev) 
	int mfg_num = CX_DEV_NONE;

	int mfg_num = CX_DEV_NONE;

	nasid_t nasid = cx_dev->cx_id.nasid;

	nasid_t nasid = cx_dev->cx_id.nasid;





	if (fpga_attached(nasid)) {

	if (bitstream_loaded(nasid)) {

		uint64_t cx_id;

		uint64_t cx_id;





		cx_id =

		cx_id =
@@ -414,9 +436,10 @@ static ssize_t show_cxdev_control(struct device *dev, char *buf) 
{

{

	struct cx_dev *cx_dev = to_cx_dev(dev);

	struct cx_dev *cx_dev = to_cx_dev(dev);





	return sprintf(buf, "0x%x 0x%x 0x%x\n",

	return sprintf(buf, "0x%x 0x%x 0x%x %d\n",

		       cx_dev->cx_id.nasid,

		       cx_dev->cx_id.nasid,

		       cx_dev->cx_id.part_num, cx_dev->cx_id.mfg_num);

		       cx_dev->cx_id.part_num, cx_dev->cx_id.mfg_num,

		       tiocx_btchar_get(cx_dev->cx_id.nasid));

}

}





static ssize_t store_cxdev_control(struct device *dev, const char *buf,

static ssize_t store_cxdev_control(struct device *dev, const char *buf,
@@ -462,7 +485,7 @@ static int __init tiocx_init(void) 
		if ((nasid = cnodeid_to_nasid(cnodeid)) < 0)

		if ((nasid = cnodeid_to_nasid(cnodeid)) < 0)

			break;	/* No more nasids .. bail out of loop */

			break;	/* No more nasids .. bail out of loop */





		if (nasid & 0x1) {	/* TIO's are always odd */

		if ((nasid & 0x1) && is_fpga_brick(nasid)) {

			struct hubdev_info *hubdev;

			struct hubdev_info *hubdev;

			struct xwidget_info *widgetp;

			struct xwidget_info *widgetp;

include/asm-ia64/sn/l1.h

+2 −1
Original line number Original line Diff line number Diff line
@@ -29,8 +29,9 @@ 
#define L1_BRICKTYPE_CHI_CG     0x76            /* v */

#define L1_BRICKTYPE_CHI_CG     0x76            /* v */

#define L1_BRICKTYPE_X          0x78            /* x */

#define L1_BRICKTYPE_X          0x78            /* x */

#define L1_BRICKTYPE_X2         0x79            /* y */

#define L1_BRICKTYPE_X2         0x79            /* y */

#define L1_BRICKTYPE_SA		0x5e            /* ^ */ /* TIO bringup brick */

#define L1_BRICKTYPE_SA		0x5e            /* ^ */

#define L1_BRICKTYPE_PA		0x6a            /* j */

#define L1_BRICKTYPE_PA		0x6a            /* j */

#define L1_BRICKTYPE_IA		0x6b            /* k */

#define L1_BRICKTYPE_IA		0x6b            /* k */

#define L1_BRICKTYPE_ATHENA	0x2b            /* + */





#endif /* _ASM_IA64_SN_L1_H */
 
#endif /* _ASM_IA64_SN_L1_H */