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Commit cd6d92d2 authored by Xiubo Li's avatar Xiubo Li Committed by Thierry Reding
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pwm: fsl-ftm: Clean up the code 



This patch intends to prepare for converting to direct regmap API usage.

Signed-off-by: default avatarXiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent d717ea73

drivers/pwm/pwm-fsl-ftm.c

+6 −7
Original line number Diff line number Diff line
@@ -21,11 +21,10 @@ 
#include <linux/slab.h>



#define FTM_SC		0x00

#define FTM_SC_CLK_MASK	0x3

#define FTM_SC_CLK_SHIFT	3

#define FTM_SC_CLK(c)	(((c) + 1) << FTM_SC_CLK_SHIFT)

#define FTM_SC_CLK_MASK_SHIFT	3

#define FTM_SC_CLK_MASK	(3 << FTM_SC_CLK_MASK_SHIFT)

#define FTM_SC_CLK(c)	(((c) + 1) << FTM_SC_CLK_MASK_SHIFT)

#define FTM_SC_PS_MASK	0x7

#define FTM_SC_PS_SHIFT	0



#define FTM_CNT		0x04

#define FTM_MOD		0x08
@@ -258,7 +257,7 @@ static int fsl_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 
		}



		val = readl(fpc->base + FTM_SC);

		val &= ~(FTM_SC_PS_MASK << FTM_SC_PS_SHIFT);

		val &= ~FTM_SC_PS_MASK;

		val |= fpc->clk_ps;

		writel(val, fpc->base + FTM_SC);

		writel(period - 1, fpc->base + FTM_MOD);
@@ -305,7 +304,7 @@ static int fsl_counter_clock_enable(struct fsl_pwm_chip *fpc) 


	/* select counter clock source */

	val = readl(fpc->base + FTM_SC);

	val &= ~(FTM_SC_CLK_MASK << FTM_SC_CLK_SHIFT);

	val &= ~FTM_SC_CLK_MASK;

	val |= FTM_SC_CLK(fpc->cnt_select);

	writel(val, fpc->base + FTM_SC);
@@ -357,7 +356,7 @@ static void fsl_counter_clock_disable(struct fsl_pwm_chip *fpc) 


	/* no users left, disable PWM counter clock */

	val = readl(fpc->base + FTM_SC);

	val &= ~(FTM_SC_CLK_MASK << FTM_SC_CLK_SHIFT);

	val &= ~FTM_SC_CLK_MASK;

	writel(val, fpc->base + FTM_SC);



	clk_disable_unprepare(fpc->clk[FSL_PWM_CLK_CNTEN]);