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Commit cca0502b authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/ 



INTEL_OUTPUT_DISPLAYPORT hsa been bugging me for a long time. It always
looks out of place besides INTEL_OUTPUT_EDP and INTEL_OUTPUT_DP_MST.
Let's just rename it to INTEL_OUTPUT_DP.

v2: Rebase

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarMika Kahola <mika.kahola@intel.com>
Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-9-git-send-email-ville.syrjala@linux.intel.com
parent 2210ce7f

drivers/gpu/drm/i915/i915_debugfs.c

+1 −1
Original line number Diff line number Diff line
@@ -3774,7 +3774,7 @@ static int i9xx_pipe_crc_auto_source(struct drm_device *dev, enum pipe pipe, 
		case INTEL_OUTPUT_TVOUT:

			*source = INTEL_PIPE_CRC_SOURCE_TV;

			break;

		case INTEL_OUTPUT_DISPLAYPORT:

		case INTEL_OUTPUT_DP:

		case INTEL_OUTPUT_EDP:

			dig_port = enc_to_dig_port(&encoder->base);

			switch (dig_port->port) {

drivers/gpu/drm/i915/intel_ddi.c

+8 −8
Original line number Diff line number Diff line
@@ -318,7 +318,7 @@ static void ddi_get_encoder_port(struct intel_encoder *intel_encoder, 
	default:

		WARN(1, "Invalid DDI encoder type %d\n", intel_encoder->type);

		/* fallthrough and treat as unknown */

	case INTEL_OUTPUT_DISPLAYPORT:

	case INTEL_OUTPUT_DP:

	case INTEL_OUTPUT_EDP:

	case INTEL_OUTPUT_HDMI:

	case INTEL_OUTPUT_UNKNOWN:
@@ -482,7 +482,7 @@ void intel_prepare_ddi_buffer(struct intel_encoder *encoder) 
		ddi_translations = ddi_translations_edp;

		size = n_edp_entries;

		break;

	case INTEL_OUTPUT_DISPLAYPORT:

	case INTEL_OUTPUT_DP:

	case INTEL_OUTPUT_HDMI:

		ddi_translations = ddi_translations_dp;

		size = n_dp_entries;
@@ -1068,7 +1068,7 @@ void intel_ddi_set_pipe_settings(struct drm_crtc *crtc) 
	int type = intel_encoder->type;

	uint32_t temp;



	if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP || type == INTEL_OUTPUT_DP_MST) {

	if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP || type == INTEL_OUTPUT_DP_MST) {

		WARN_ON(transcoder_is_dsi(cpu_transcoder));



		temp = TRANS_MSA_SYNC_CLK;
@@ -1182,7 +1182,7 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc) 
		temp |= TRANS_DDI_MODE_SELECT_FDI;

		temp |= (intel_crtc->config->fdi_lanes - 1) << 1;



	} else if (type == INTEL_OUTPUT_DISPLAYPORT ||

	} else if (type == INTEL_OUTPUT_DP ||

		   type == INTEL_OUTPUT_EDP) {

		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
@@ -1392,7 +1392,7 @@ static void skl_ddi_set_iboost(struct drm_i915_private *dev_priv, 
	dp_iboost = dev_priv->vbt.ddi_port_info[port].dp_boost_level;

	hdmi_iboost = dev_priv->vbt.ddi_port_info[port].hdmi_boost_level;



	if (type == INTEL_OUTPUT_DISPLAYPORT) {

	if (type == INTEL_OUTPUT_DP) {

		if (dp_iboost) {

			iboost = dp_iboost;

		} else {
@@ -1450,7 +1450,7 @@ static void bxt_ddi_vswing_sequence(struct drm_i915_private *dev_priv, 
	if (type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp.low_vswing) {

		n_entries = ARRAY_SIZE(bxt_ddi_translations_edp);

		ddi_translations = bxt_ddi_translations_edp;

	} else if (type == INTEL_OUTPUT_DISPLAYPORT

	} else if (type == INTEL_OUTPUT_DP

			|| type == INTEL_OUTPUT_EDP) {

		n_entries = ARRAY_SIZE(bxt_ddi_translations_dp);

		ddi_translations = bxt_ddi_translations_dp;
@@ -1624,7 +1624,7 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder) 


	intel_ddi_clk_select(intel_encoder, crtc->config);



	if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {

	if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {

		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);



		intel_dp_set_link_params(intel_dp, crtc->config);
@@ -1669,7 +1669,7 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder) 
	if (wait)

		intel_wait_ddi_buf_idle(dev_priv, port);



	if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {

	if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {

		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);

		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);

		intel_edp_panel_vdd_on(intel_dp);

drivers/gpu/drm/i915/intel_display.c

+4 −4
Original line number Diff line number Diff line
@@ -4040,7 +4040,7 @@ intel_trans_dp_port_sel(struct drm_crtc *crtc) 
	struct intel_encoder *encoder;



	for_each_encoder_on_crtc(dev, crtc, encoder) {

		if (encoder->type == INTEL_OUTPUT_DISPLAYPORT ||

		if (encoder->type == INTEL_OUTPUT_DP ||

		    encoder->type == INTEL_OUTPUT_EDP)

			return enc_to_dig_port(&encoder->base)->port;

	}
@@ -5128,7 +5128,7 @@ intel_display_port_power_domain(struct intel_encoder *intel_encoder) 
	case INTEL_OUTPUT_UNKNOWN:

		/* Only DDI platforms should ever use this output type */

		WARN_ON_ONCE(!HAS_DDI(dev));

	case INTEL_OUTPUT_DISPLAYPORT:

	case INTEL_OUTPUT_DP:

	case INTEL_OUTPUT_HDMI:

	case INTEL_OUTPUT_EDP:

		intel_dig_port = enc_to_dig_port(&intel_encoder->base);
@@ -5162,7 +5162,7 @@ intel_display_port_aux_power_domain(struct intel_encoder *intel_encoder) 
		 * run the DP detection too.

		 */

		WARN_ON_ONCE(!HAS_DDI(dev));

	case INTEL_OUTPUT_DISPLAYPORT:

	case INTEL_OUTPUT_DP:

	case INTEL_OUTPUT_EDP:

		intel_dig_port = enc_to_dig_port(&intel_encoder->base);

		return port_to_aux_power_domain(intel_dig_port->port);
@@ -12377,7 +12377,7 @@ static bool check_digital_port_conflicts(struct drm_atomic_state *state) 
		case INTEL_OUTPUT_UNKNOWN:

			if (WARN_ON(!HAS_DDI(dev)))

				break;

		case INTEL_OUTPUT_DISPLAYPORT:

		case INTEL_OUTPUT_DP:

		case INTEL_OUTPUT_HDMI:

		case INTEL_OUTPUT_EDP:

			port_mask = 1 << enc_to_dig_port(&encoder->base)->port;

drivers/gpu/drm/i915/intel_dp.c

+5 −5
Original line number Diff line number Diff line
@@ -4250,7 +4250,7 @@ intel_dp_long_pulse(struct intel_connector *intel_connector) 
	}



	if (intel_encoder->type != INTEL_OUTPUT_EDP)

		intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;

		intel_encoder->type = INTEL_OUTPUT_DP;



	intel_dp_probe_oui(intel_dp);
@@ -4326,7 +4326,7 @@ intel_dp_detect(struct drm_connector *connector, bool force) 
		/* MST devices are disconnected from a monitor POV */

		intel_dp_unset_edid(intel_dp);

		if (intel_encoder->type != INTEL_OUTPUT_EDP)

			intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;

			intel_encoder->type = INTEL_OUTPUT_DP;

		return connector_status_disconnected;

	}
@@ -4365,7 +4365,7 @@ intel_dp_force(struct drm_connector *connector) 
	intel_display_power_put(dev_priv, power_domain);



	if (intel_encoder->type != INTEL_OUTPUT_EDP)

		intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;

		intel_encoder->type = INTEL_OUTPUT_DP;

}



static int intel_dp_get_modes(struct drm_connector *connector)
@@ -4678,7 +4678,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) 


	if (intel_dig_port->base.type != INTEL_OUTPUT_EDP &&

	    intel_dig_port->base.type != INTEL_OUTPUT_HDMI)

		intel_dig_port->base.type = INTEL_OUTPUT_DISPLAYPORT;

		intel_dig_port->base.type = INTEL_OUTPUT_DP;



	if (long_hpd && intel_dig_port->base.type == INTEL_OUTPUT_EDP) {

		/*
@@ -5694,7 +5694,7 @@ bool intel_dp_init(struct drm_device *dev, 
	intel_dig_port->dp.output_reg = output_reg;

	intel_dig_port->max_lanes = 4;



	intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;

	intel_encoder->type = INTEL_OUTPUT_DP;

	if (IS_CHERRYVIEW(dev)) {

		if (port == PORT_D)

			intel_encoder->crtc_mask = 1 << 2;

drivers/gpu/drm/i915/intel_dpll_mgr.c

+3 −3
Original line number Diff line number Diff line
@@ -713,7 +713,7 @@ hsw_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, 
		pll = intel_find_shared_dpll(crtc, crtc_state,

					     DPLL_ID_WRPLL1, DPLL_ID_WRPLL2);



	} else if (encoder->type == INTEL_OUTPUT_DISPLAYPORT ||

	} else if (encoder->type == INTEL_OUTPUT_DP ||

		   encoder->type == INTEL_OUTPUT_DP_MST ||

		   encoder->type == INTEL_OUTPUT_EDP) {

		enum intel_dpll_id pll_id;
@@ -1226,7 +1226,7 @@ skl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, 
			 DPLL_CFGCR2_KDIV(wrpll_params.kdiv) |

			 DPLL_CFGCR2_PDIV(wrpll_params.pdiv) |

			 wrpll_params.central_freq;

	} else if (encoder->type == INTEL_OUTPUT_DISPLAYPORT ||

	} else if (encoder->type == INTEL_OUTPUT_DP ||

		   encoder->type == INTEL_OUTPUT_DP_MST ||

		   encoder->type == INTEL_OUTPUT_EDP) {

		switch (crtc_state->port_clock / 2) {
@@ -1534,7 +1534,7 @@ bxt_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, 
		clk_div.m2_frac_en = clk_div.m2_frac != 0;



		vco = best_clock.vco;

	} else if (encoder->type == INTEL_OUTPUT_DISPLAYPORT ||

	} else if (encoder->type == INTEL_OUTPUT_DP ||

		   encoder->type == INTEL_OUTPUT_EDP) {

		int i;