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Commit cc3665a6 authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Benjamin Herrenschmidt
Browse files

powerpc: Don't hard code the size of pte page



USE PTRS_PER_PTE to indicate the size of pte page. To support THP,
later patches will be changing PTRS_PER_PTE value.

Acked-by: default avatarPaul Mackerras <paulus@samba.org>
Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent ce54152f
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+6 −0
Original line number Original line Diff line number Diff line
@@ -17,6 +17,12 @@ struct mm_struct;
#  include <asm/pgtable-ppc32.h>
#  include <asm/pgtable-ppc32.h>
#endif
#endif


/*
 * We save the slot number & secondary bit in the second half of the
 * PTE page. We use the 8 bytes per each pte entry.
 */
#define PTE_PAGE_HIDX_OFFSET (PTRS_PER_PTE * 8)

#ifndef __ASSEMBLY__
#ifndef __ASSEMBLY__


#include <asm/tlbflush.h>
#include <asm/tlbflush.h>
+2 −2
Original line number Original line Diff line number Diff line
@@ -490,7 +490,7 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
	beq	htab_inval_old_hpte
	beq	htab_inval_old_hpte


	ld	r6,STK_PARAM(R6)(r1)
	ld	r6,STK_PARAM(R6)(r1)
	ori	r26,r6,0x8000		/* Load the hidx mask */
	ori	r26,r6,PTE_PAGE_HIDX_OFFSET /* Load the hidx mask. */
	ld	r26,0(r26)
	ld	r26,0(r26)
	addi	r5,r25,36		/* Check actual HPTE_SUB bit, this */
	addi	r5,r25,36		/* Check actual HPTE_SUB bit, this */
	rldcr.	r0,r31,r5,0		/* must match pgtable.h definition */
	rldcr.	r0,r31,r5,0		/* must match pgtable.h definition */
@@ -607,7 +607,7 @@ htab_pte_insert_ok:
	sld	r4,r4,r5
	sld	r4,r4,r5
	andc	r26,r26,r4
	andc	r26,r26,r4
	or	r26,r26,r3
	or	r26,r26,r3
	ori	r5,r6,0x8000
	ori	r5,r6,PTE_PAGE_HIDX_OFFSET
	std	r26,0(r5)
	std	r26,0(r5)
	lwsync
	lwsync
	std	r30,0(r6)
	std	r30,0(r6)