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Commit cc30876a authored by Abhijit Trivedi's avatar Abhijit Trivedi
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Merge commit '0b564a62' - AU138 onto Topic branch 



Fastforward Topic branch to AU138

* commit '0b564a62':
  netfilter:Notify user space on creating sysfs file
  crypto: msm: fix rfc4309(ccm(aes)) issue on msm-4.4
  dwc3: Fix USB TRB ring initialization in BAM2BAM case
  msm: vidc: Do not update dimensions during sufficient event
  misc: Increase dynamic number space
  qcom: scm: Support register r6 to pass the session id
  ARM: dts: msm: Add duplicate coresight funnel devices for sdm845
  coresight: funnel: add support for duplicating funnel devices
  defconfig: sdm845: Enable Android base config options
  drivers: mailbox: fix control TCS sizing
  msm: kgsl: Don't re-allocate A6XX SQE firmware
  msm: kgsl: Free global memory if mapping fails
  clk: qcom: Add regmap mux-div clocks support
  udc: core: Add handling for case where allocated buffer is not mapped
  msm: sps: Fix incompatible type assignment
  Revert "mtd: make mtd_partition.name const"
  mtd: Enable msm_qpic_nand driver for ARCH_QCOM
  msm: vidc: Addition of enums for HLG and HDR10
  mmc: core: Replacing sprintf() with snprintf()
  ARM: dts: msm: Remove freq tables for l3-cpu* devices for SDM845
  devfreq: simple-dev: Make the freq-table property optional
  drivers: soc: qcom: Makefile update to disable KCOV instrumentation
  defconfig: arm64: Enable paranoid SD card initialization for SDM845
  soc: qcom: msm-core: Update power table for gold cluster
  msm: kgsl: Enable SPTP power collapse
  Revert "msm: kgsl: Disable GMU by default"
  drm: msm: Remove stddef.h include from uapi
  mtd: msm_qpic_nand: Add snapshot of QPIC nand driver
  coresight: tmc: Avoid NULL pointer dereference
  coresight-cti: Fix unbalanced PM runtime calls
  msm: vidc: Optimize buffer requirements call to HW
  coresight: stm: Remove spin lock usage for channel allocation

Change-Id: I6fe8bbe30d49af4b7a93fd922d749125a9db7724
Signed-off-by: default avatarAbhijit Trivedi <abhijitt@codeaurora.org>
parents 01b1b350 0b564a62

Documentation/devicetree/bindings/arm/coresight.txt

+17 −0
Original line number Diff line number Diff line
@@ -159,6 +159,23 @@ its hardware characteristcs. 


	* qcom,inst-id: must be present. QMI instance id for remote ETMs.



* Optional properties for funnels:



	* qcom,duplicate-funnel: boolean, indicates its a duplicate of an

	  existing funnel. Funnel devices are now capable of supporting

	  multiple-input and multiple-output configuration with in built

	  hardware filtering for TPDM devices. Each set of input-output

	  combination is treated as independent funnel device.

	  funnel-base-dummy and funnel-base-real reg-names must be specified

	  when this property is enabled.



	* reg-names: funnel-base-dummy: dummy register space used by a

	  duplicate funnel. Should be a valid register address space that

	  no other device is using.



	* reg-names: funnel-base-real: actual register space for the

	  duplicate funnel.



Example:



1. Sinks

Documentation/devicetree/bindings/devfreq/devfreq-simple-dev.txt

+2 −2
Original line number Diff line number Diff line
@@ -9,12 +9,12 @@ Required properties: 
- compatible:		Must be "devfreq-simple-dev"

- clock-names:		Must be "devfreq_clk"

- clocks:		Must refer to the clock that's fed to the device.

- freq-tbl-khz:		A list of usable frequencies (in KHz) for the device

			clock.

Optional properties:

- polling-ms:	Polling interval for the device in milliseconds. Default: 50

- governor:	Initial governor to user for the device. Default: "performance"

- qcom,prepare-clk:	Prepare the device clock during initialization.

- freq-tbl-khz:		A list of usable frequencies (in kHz) for the device

			clock.



Example:

Documentation/devicetree/bindings/mtd/msm_qpic_nand.txt

0 → 100644
+74 −0
Original line number Diff line number Diff line 
Qualcomm Technologies, Inc. Parallel Interface controller (QPIC) for NAND devices



Required properties:

- compatible : "qcom,msm-nand".

- reg : should specify QPIC NANDc and BAM physical address range.

- reg-names : should specify relevant names to each reg property defined.

- interrupts : should specify QPIC/BAM interrupt numbers.

- interrupt-names : should specify relevant names to each interrupts property

  defined.

- qcom,reg-adjustment-offset : Specify the base adjustment offset value for the

  version registers



MTD flash partition layout for NAND devices -



Each partition is represented as a sub-node of the qcom,mtd-partitions device.

Each node's name represents the name of the corresponding partition.



This is now completely optional as the partition information is avaialble from

bootloader.



Optional properties:

- reg : boot_cfg. This is needed only on the targets where both NAND and eMMC

  devices are supported. On eMMC based builds, NAND cannot be enabled by

  default due to the absence of some of its required resources.

- reg : The partition offset and size

- label : The label / name for this partition.

- read-only: This parameter, if present, indicates that this partition

  should only be mounted read-only.

- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for

below optional properties:

	- qcom,msm-bus,name

	- qcom,msm-bus,num-cases

	- qcom,msm-bus,active-only

	- qcom,msm-bus,num-paths

	- qcom,msm-bus,vectors-KBps



Examples:



	qcom,nand@f9af0000 {

		compatible = "qcom,msm-nand";

		reg = <0xf9af0000 0x1000>,

		      <0xf9ac4000 0x8000>,

		      <0x5e02c 0x4>;

		reg-names = "nand_phys",

			    "bam_phys",

			    "boot_cfg";

		qcom,reg-adjustment-offset = <0x4000>;



		interrupts = <0 279 0>;

		interrupt-names = "bam_irq";



		qcom,msm-bus,name = "qpic_nand";

		qcom,msm-bus,num-cases = <1>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps = <91 512 0 0>,

	};



       qcom,mtd-partitions {

	       #address-cells = <1>;

	       #size-cells = <1>;

               partition@0 {

                       label = "boot";

                       reg = <0x0 0x1000>;

		       read-only;

               };

               partition@20000 {

                       label = "userdata";

                       reg = <0x20000 0x1000>;

               };

               partition@40000 {

                       label = "system";

                       reg = <0x40000 0x1000>;

               };

       };

arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi

+87 −10
Original line number Diff line number Diff line
@@ -767,13 +767,42 @@ 
					    <&tpdm_lpass_out_funnel_lpass>;

				};

			};

		};

	};



			port@2 {

	funnel_lpass_1: funnel_1@6845000 {

		compatible = "arm,primecell";

		arm,primecell-periphid = <0x0003b908>;



		reg = <0x6867010 0x10>,

		      <0x6845000 0x1000>;

		reg-names = "funnel-base-dummy", "funnel-base-real";



		coresight-name = "coresight-funnel-lpass-1";



		clocks = <&clock_aop QDSS_CLK>;

		clock-names = "apb_pclk";



		qcom,duplicate-funnel;



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				funnel_lpass_1_out_funnel_qatb: endpoint {

					remote-endpoint =

					    <&funnel_qatb_in_funnel_lpass_1>;

				};

			};



			port@1 {

				reg = <1>;

				funnel_lpass_in_audio_etm0: endpoint {

				funnel_lpass_1_in_audio_etm0: endpoint {

					slave-mode;

					remote-endpoint =

					    <&audio_etm0_out_funnel_lpass>;

					    <&audio_etm0_out_funnel_lpass_1>;

				};

			};

		};
@@ -1100,13 +1129,42 @@ 
					    <&tpdm_turing_out_funnel_turing>;

				};

			};

		};

	};



			port@2 {

	funnel_turing_1: funnel_1@6861000 {

		compatible = "arm,primecell";

		arm,primecell-periphid = <0x0003b908>;



		reg = <0x6867000 0x10>,

		      <0x6861000 0x1000>;

		reg-names = "funnel-base-dummy", "funnel-base-real";



		coresight-name = "coresight-funnel-turing-1";



		clocks = <&clock_aop QDSS_CLK>;

		clock-names = "apb_pclk";



		qcom,duplicate-funnel;



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				funnel_turing_1_out_funnel_qatb: endpoint {

					remote-endpoint =

					    <&funnel_qatb_in_funnel_turing_1>;

				};

			};



			port@1 {

				reg = <1>;

				funnel_turing_in_turing_etm0: endpoint {

				funnel_turing_1_in_turing_etm0: endpoint {

					slave-mode;

					remote-endpoint =

					    <&turing_etm0_out_funnel_turing>;

					    <&turing_etm0_out_funnel_turing_1>;

				};

			};

		};
@@ -1394,6 +1452,24 @@ 
						<&tpda_out_funnel_qatb>;

				};

			};



			port@2 {

				reg = <6>;

				funnel_qatb_in_funnel_lpass_1: endpoint {

					slave-mode;

					remote-endpoint =

					    <&funnel_lpass_1_out_funnel_qatb>;

				};

			};



			port@3 {

				reg = <7>;

				funnel_qatb_in_funnel_turing_1: endpoint {

					slave-mode;

					remote-endpoint =

					    <&funnel_turing_1_out_funnel_qatb>;

				};

			};

		};

	};
@@ -1780,9 +1856,9 @@ 
		qcom,inst-id = <13>;



		port{

			turing_etm0_out_funnel_turing: endpoint {

			turing_etm0_out_funnel_turing_1: endpoint {

				remote-endpoint =

					<&funnel_turing_in_turing_etm0>;

					<&funnel_turing_1_in_turing_etm0>;

			};

		};

	};
@@ -1823,8 +1899,9 @@ 
		qcom,inst-id = <5>;



		port {

			audio_etm0_out_funnel_lpass: endpoint {

				remote-endpoint = <&funnel_lpass_in_audio_etm0>;

			audio_etm0_out_funnel_lpass_1: endpoint {

				remote-endpoint =

					<&funnel_lpass_1_in_audio_etm0>;

			};

		};

	};

arch/arm64/boot/dts/qcom/sdm845.dtsi

+0 −28
Original line number Diff line number Diff line
@@ -939,20 +939,6 @@ 
		clocks = <&clock_cpucc L3_CLUSTER0_VOTE_CLK>;

		governor = "performance";

		qcom,prepare-clk;

		freq-tbl-khz =

			< 300000 >,

			< 422400 >,

			< 499200 >,

			< 576000 >,

			< 652800 >,

			< 729600 >,

			< 806400 >,

			< 883200 >,

			< 960000 >,

			< 1036800 >,

			< 1094400 >,

			< 1209600 >,

			< 1305600 >;

	};



	l3_cpu4: qcom,l3-cpu4 {
@@ -961,20 +947,6 @@ 
		clocks = <&clock_cpucc L3_CLUSTER1_VOTE_CLK>;

		governor = "performance";

		qcom,prepare-clk;

		freq-tbl-khz =

			< 300000 >,

			< 422400 >,

			< 499200 >,

			< 576000 >,

			< 652800 >,

			< 729600 >,

			< 806400 >,

			< 883200 >,

			< 960000 >,

			< 1036800 >,

			< 1094400 >,

			< 1209600 >,

			< 1305600 >;

	};



	devfreq_l3lat_0: qcom,cpu0-l3lat-mon {