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Commit cbfd23e6 authored by Vicky Wallace's avatar Vicky Wallace Committed by Gerrit - the friendly Code Review server
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clk: qcom: gcc-sdxpoorwills: Update EMAC RCG frequencies table 



EMAC clock frequency table is missing 2.5MHz and 5 MHz. This
change adds that.

CRs-Fixed: 2162209
Change-Id: Ibff56518e8ccb1eb266c35031188358222803444
Signed-off-by: default avatarVicky Wallace <vwallace@codeaurora.org>
parent 6847aa66

drivers/clk/qcom/gcc-sdxpoorwills.c

+3 −0
Original line number Diff line number Diff line
@@ -541,7 +541,10 @@ static struct clk_rcg2 gcc_cpuss_rbcpr_clk_src = { 
};



static const struct freq_tbl ftbl_gcc_emac_clk_src[] = {

	F(2500000, P_BI_TCXO, 1, 25, 192),

	F(5000000, P_BI_TCXO, 1, 25, 96),

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(25000000, P_GPLL0_OUT_EVEN, 12, 0, 0),

	F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0),

	F(125000000, P_GPLL4_OUT_EVEN, 4, 0, 0),

	F(250000000, P_GPLL4_OUT_EVEN, 2, 0, 0),