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Commit cbb18e28 authored by George Shen's avatar George Shen Committed by Kyle Piefer
Browse files

msm: kgsl: Update GMU cold boot sequence 



The second GMU cold boot should use the RPMh wake
sequence to set up the GFX rail instead of voting for the
GFX rail from GMU. Otherwise, the RPMh state will be
corrupted.

CRs-Fixed: 2017390
Change-Id: Ibce5d87c7fb59a74c3e60bff3bee27cf069c9474
Signed-off-by: default avatarGeorge Shen <sqiao@codeaurora.org>
Signed-off-by: default avatarKyle Piefer <kpiefer@codeaurora.org>
parent 492b05c7

drivers/gpu/msm/adreno_a6xx.c

+36 −32
Original line number Diff line number Diff line
@@ -1232,8 +1232,6 @@ static int a6xx_rpmh_power_on_gpu(struct kgsl_device *device) 
	struct device *dev = &gmu->pdev->dev;

	int ret = 0;



	if (device->state != KGSL_STATE_INIT &&

		device->state != KGSL_STATE_SUSPEND) {

	/* RSC wake sequence */

	kgsl_gmu_regwrite(device, A6XX_GMU_RSCC_CONTROL_REQ, BIT(1));
@@ -1260,7 +1258,6 @@ static int a6xx_rpmh_power_on_gpu(struct kgsl_device *device) 


	/* Turn on the HM and SPTP head switches */

	ret = a6xx_hm_sptprac_control(device, true);

	}



	return ret;
@@ -1319,16 +1316,21 @@ static int a6xx_gmu_fw_start(struct kgsl_device *device, 
	int ret, i;



	if (boot_state == GMU_COLD_BOOT || boot_state == GMU_RESET) {

		/* Turn on the HM and SPTP head switches */

		ret = a6xx_hm_sptprac_control(device, true);

		if (ret)

			return ret;



		/* Turn on TCM retention */

		kgsl_gmu_regwrite(device, A6XX_GMU_GENERAL_7, 1);



		if (!test_and_set_bit(GMU_BOOT_INIT_DONE, &gmu->flags))

		if (!test_and_set_bit(GMU_BOOT_INIT_DONE, &gmu->flags)) {

			_load_gmu_rpmh_ucode(device);

			/* Turn on the HM and SPTP head switches */

			ret = a6xx_hm_sptprac_control(device, true);

			if (ret)

				return ret;

		} else {

			ret = a6xx_rpmh_power_on_gpu(device);

			if (ret)

				return ret;

		}



		if (gmu->load_mode == TCM_BOOT) {

			/* Load GMU image via AHB bus */
@@ -1486,7 +1488,9 @@ static bool a6xx_hw_isidle(struct adreno_device *adreno_dev) 


	kgsl_gmu_regread(KGSL_DEVICE(adreno_dev),

		A6XX_GPU_GMU_AO_GPU_CX_BUSY_STATUS, &reg);

	return ((~reg & GPUBUSYIGNAHB) != 0);

	if (reg & GPUBUSYIGNAHB)

		return false;

	return true;

}



static int a6xx_wait_for_gmu_idle(struct adreno_device *adreno_dev)