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Commit cb2effe5 authored by Mark Rustad's avatar Mark Rustad Committed by Jeff Kirsher
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ixgbe: Release semaphore bits in the right order



The global semaphore bits should be released in the reverse of the
order that they were taken, so correct that.

Signed-off-by: default avatarMark Rustad <mark.d.rustad@intel.com>
Tested-by: default avatarPhil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent ae14a1d8
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+4 −4
Original line number Original line Diff line number Diff line
@@ -696,14 +696,14 @@ static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw)


	/* Release both semaphores by writing 0 to the bits REGSMP and SMBI */
	/* Release both semaphores by writing 0 to the bits REGSMP and SMBI */


	swsm = IXGBE_READ_REG(hw, IXGBE_SWSM);
	swsm &= ~IXGBE_SWSM_SMBI;
	IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);

	swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC);
	swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC);
	swsm &= ~IXGBE_SWFW_REGSMP;
	swsm &= ~IXGBE_SWFW_REGSMP;
	IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swsm);
	IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC, swsm);


	swsm = IXGBE_READ_REG(hw, IXGBE_SWSM);
	swsm &= ~IXGBE_SWSM_SMBI;
	IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);

	IXGBE_WRITE_FLUSH(hw);
	IXGBE_WRITE_FLUSH(hw);
}
}