Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 9 SUBLEVEL = 10 EXTRAVERSION = NAME = Roaring Lionus Loading arch/arc/kernel/unaligned.c +1 −1 Original line number Diff line number Diff line Loading @@ -243,7 +243,7 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs, /* clear any remanants of delay slot */ if (delay_mode(regs)) { regs->ret = regs->bta ~1U; regs->ret = regs->bta & ~1U; regs->status32 &= ~STATUS_DE_MASK; } else { regs->ret += state.instr_len; Loading arch/arm/boot/dts/imx6dl.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -137,7 +137,7 @@ &gpio4 { gpio-ranges = <&iomuxc 5 136 1>, <&iomuxc 6 145 1>, <&iomuxc 7 150 1>, <&iomuxc 8 146 1>, <&iomuxc 9 151 1>, <&iomuxc 10 147 1>, <&iomuxc 11 151 1>, <&iomuxc 12 148 1>, <&iomuxc 13 153 1>, <&iomuxc 11 152 1>, <&iomuxc 12 148 1>, <&iomuxc 13 153 1>, <&iomuxc 14 149 1>, <&iomuxc 15 154 1>, <&iomuxc 16 39 7>, <&iomuxc 23 56 1>, <&iomuxc 24 61 7>, <&iomuxc 31 46 1>; }; Loading arch/arm/kernel/ptrace.c +1 −1 Original line number Diff line number Diff line Loading @@ -600,7 +600,7 @@ static int gpr_set(struct task_struct *target, const void *kbuf, const void __user *ubuf) { int ret; struct pt_regs newregs; struct pt_regs newregs = *task_pt_regs(target); ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, Loading arch/arm/mm/fault.c +2 −2 Original line number Diff line number Diff line Loading @@ -610,9 +610,9 @@ static int __init early_abort_handler(unsigned long addr, unsigned int fsr, void __init early_abt_enable(void) { fsr_info[22].fn = early_abort_handler; fsr_info[FSR_FS_AEA].fn = early_abort_handler; local_abt_enable(); fsr_info[22].fn = do_bad; fsr_info[FSR_FS_AEA].fn = do_bad; } #ifndef CONFIG_ARM_LPAE Loading Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 9 SUBLEVEL = 10 EXTRAVERSION = NAME = Roaring Lionus Loading
arch/arc/kernel/unaligned.c +1 −1 Original line number Diff line number Diff line Loading @@ -243,7 +243,7 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs, /* clear any remanants of delay slot */ if (delay_mode(regs)) { regs->ret = regs->bta ~1U; regs->ret = regs->bta & ~1U; regs->status32 &= ~STATUS_DE_MASK; } else { regs->ret += state.instr_len; Loading
arch/arm/boot/dts/imx6dl.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -137,7 +137,7 @@ &gpio4 { gpio-ranges = <&iomuxc 5 136 1>, <&iomuxc 6 145 1>, <&iomuxc 7 150 1>, <&iomuxc 8 146 1>, <&iomuxc 9 151 1>, <&iomuxc 10 147 1>, <&iomuxc 11 151 1>, <&iomuxc 12 148 1>, <&iomuxc 13 153 1>, <&iomuxc 11 152 1>, <&iomuxc 12 148 1>, <&iomuxc 13 153 1>, <&iomuxc 14 149 1>, <&iomuxc 15 154 1>, <&iomuxc 16 39 7>, <&iomuxc 23 56 1>, <&iomuxc 24 61 7>, <&iomuxc 31 46 1>; }; Loading
arch/arm/kernel/ptrace.c +1 −1 Original line number Diff line number Diff line Loading @@ -600,7 +600,7 @@ static int gpr_set(struct task_struct *target, const void *kbuf, const void __user *ubuf) { int ret; struct pt_regs newregs; struct pt_regs newregs = *task_pt_regs(target); ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, Loading
arch/arm/mm/fault.c +2 −2 Original line number Diff line number Diff line Loading @@ -610,9 +610,9 @@ static int __init early_abort_handler(unsigned long addr, unsigned int fsr, void __init early_abt_enable(void) { fsr_info[22].fn = early_abort_handler; fsr_info[FSR_FS_AEA].fn = early_abort_handler; local_abt_enable(); fsr_info[22].fn = do_bad; fsr_info[FSR_FS_AEA].fn = do_bad; } #ifndef CONFIG_ARM_LPAE Loading