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Commit ca90ef44 authored by Rajkumar Manoharan's avatar Rajkumar Manoharan Committed by John W. Linville
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ath9k: Process FATAL interrupts at first



FATAL and WATCHDOG interrupts should be processed first followed
by others.

Signed-off-by: default avatarRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent d2ff5ee9
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+9 −12
Original line number Diff line number Diff line
@@ -494,17 +494,6 @@ irqreturn_t ath_isr(int irq, void *dev)
	if (status & SCHED_INTR)
		sched = true;

#ifdef CONFIG_PM_SLEEP
	if (status & ATH9K_INT_BMISS) {
		if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
			ath_dbg(common, ANY, "during WoW we got a BMISS\n");
			atomic_inc(&sc->wow_got_bmiss_intr);
			atomic_dec(&sc->wow_sleep_proc_intr);
		}
	ath_dbg(common, INTERRUPT, "beacon miss interrupt\n");
	}
#endif

	/*
	 * If a FATAL or RXORN interrupt is received, we have to reset the
	 * chip immediately.
@@ -523,7 +512,15 @@ irqreturn_t ath_isr(int irq, void *dev)

		goto chip_reset;
	}

#ifdef CONFIG_PM_SLEEP
	if (status & ATH9K_INT_BMISS) {
		if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
			ath_dbg(common, ANY, "during WoW we got a BMISS\n");
			atomic_inc(&sc->wow_got_bmiss_intr);
			atomic_dec(&sc->wow_sleep_proc_intr);
		}
	}
#endif
	if (status & ATH9K_INT_SWBA)
		tasklet_schedule(&sc->bcon_tasklet);