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Commit ca8989f9 authored by Amir Levy's avatar Amir Levy Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add IPA device for msmskunk 



Add IPAv3.5.1 to msmskunk. Change IPA address and IRQ
lines (in respect to IPAv3.1) and remove workarounds.

CRs-Fixed: 1077422
Change-Id: I8f0e91773bec1eba4daae5934f43e2806234b583
Signed-off-by: default avatarAmir Levy <alevy@codeaurora.org>
Signed-off-by: default avatarGidon Studinski <gidons@codeaurora.org>
parent 5044bbd0

arch/arm64/boot/dts/qcom/msmskunk.dtsi

+120 −0
Original line number Diff line number Diff line
@@ -1015,6 +1015,126 @@ 
			qcom,glinkpkt-dev-name = "smd11";

		};

	};



	qcom,msm_gsi {

		compatible = "qcom,msm_gsi";

	};



	ipa_hw: qcom,ipa@01e00000 {

		compatible = "qcom,ipa";

		reg = <0x1e00000 0x34000>,

		      <0x1e04000 0x2c000>;

		reg-names = "ipa-base", "gsi-base";

		interrupts =

			<0 311 0>,

			<0 432 0>;

		interrupt-names = "ipa-irq", "gsi-irq";

		qcom,ipa-hw-ver = <13>; /* IPA core version = IPAv3.5.1 */

		qcom,ipa-hw-mode = <1>;

		qcom,ee = <0>;

		qcom,use-gsi;

		qcom,use-ipa-tethering-bridge;

		qcom,modem-cfg-emb-pipe-flt;

		qcom,ipa-wdi2;

		qcom,use-64-bit-dma-mask;

		clock-names = "core_clk";

		clocks = <&clock_gcc 0xfa685cda>;

		qcom,msm-bus,name = "ipa";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <3>;

		qcom,msm-bus,vectors-KBps =

		/* No vote */

			<90 512 0 0>,

			<90 585 0 0>,

			<1 676 0 0>,

		/* SVS */

			<90 512 80000 640000>,

			<90 585 80000 640000>,

			<1 676 80000 80000>,

		/* NOMINAL */

			<90 512 206000 960000>,

			<90 585 206000 960000>,

			<1 676 206000 160000>,

		/* TURBO */

			<90 512 206000 3600000>,

			<90 585 206000 3600000>,

			<1 676 206000 300000>;

		qcom,bus-vector-names = "MIN", "SVS", "NOMINAL", "TURBO";



		/* IPA RAM mmap */

		qcom,ipa-ram-mmap = <

			0x280	/* ofst_start; */

			0x0	/* nat_ofst; */

			0x0	/* nat_size; */

			0x288	/* v4_flt_hash_ofst; */

			0x78	/* v4_flt_hash_size; */

			0x4000	/* v4_flt_hash_size_ddr; */

			0x308	/* v4_flt_nhash_ofst; */

			0x78	/* v4_flt_nhash_size; */

			0x4000	/* v4_flt_nhash_size_ddr; */

			0x388	/* v6_flt_hash_ofst; */

			0x78	/* v6_flt_hash_size; */

			0x4000	/* v6_flt_hash_size_ddr; */

			0x408	/* v6_flt_nhash_ofst; */

			0x78	/* v6_flt_nhash_size; */

			0x4000	/* v6_flt_nhash_size_ddr; */

			0xf	/* v4_rt_num_index; */

			0x0	/* v4_modem_rt_index_lo; */

			0x7	/* v4_modem_rt_index_hi; */

			0x8	/* v4_apps_rt_index_lo; */

			0xe	/* v4_apps_rt_index_hi; */

			0x488	/* v4_rt_hash_ofst; */

			0x78	/* v4_rt_hash_size; */

			0x4000	/* v4_rt_hash_size_ddr; */

			0x508	/* v4_rt_nhash_ofst; */

			0x78	/* v4_rt_nhash_size; */

			0x4000	/* v4_rt_nhash_size_ddr; */

			0xf	/* v6_rt_num_index; */

			0x0	/* v6_modem_rt_index_lo; */

			0x7	/* v6_modem_rt_index_hi; */

			0x8	/* v6_apps_rt_index_lo; */

			0xe	/* v6_apps_rt_index_hi; */

			0x588	/* v6_rt_hash_ofst; */

			0x78	/* v6_rt_hash_size; */

			0x4000	/* v6_rt_hash_size_ddr; */

			0x608	/* v6_rt_nhash_ofst; */

			0x78	/* v6_rt_nhash_size; */

			0x4000	/* v6_rt_nhash_size_ddr; */

			0x688	/* modem_hdr_ofst; */

			0x140	/* modem_hdr_size; */

			0x7c8	/* apps_hdr_ofst; */

			0x0	/* apps_hdr_size; */

			0x800	/* apps_hdr_size_ddr; */

			0x7d0	/* modem_hdr_proc_ctx_ofst; */

			0x200	/* modem_hdr_proc_ctx_size; */

			0x9d0	/* apps_hdr_proc_ctx_ofst; */

			0x200	/* apps_hdr_proc_ctx_size; */

			0x0	/* apps_hdr_proc_ctx_size_ddr; */

			0x0	/* modem_comp_decomp_ofst; diff */

			0x0	/* modem_comp_decomp_size; diff */

			0xbd8	/* modem_ofst; */

			0x1424	/* modem_size; */

			0x1ffc	/* apps_v4_flt_hash_ofst; */

			0x0	/* apps_v4_flt_hash_size; */

			0x1ffc	/* apps_v4_flt_nhash_ofst; */

			0x0	/* apps_v4_flt_nhash_size; */

			0x1ffc	/* apps_v6_flt_hash_ofst; */

			0x0	/* apps_v6_flt_hash_size; */

			0x1ffc	/* apps_v6_flt_nhash_ofst; */

			0x0	/* apps_v6_flt_nhash_size; */

			0x80	/* uc_info_ofst; */

			0x200	/* uc_info_size; */

			0x2000	/* end_ofst; */

			0x1ffc	/* apps_v4_rt_hash_ofst; */

			0x0	/* apps_v4_rt_hash_size; */

			0x1ffc	/* apps_v4_rt_nhash_ofst; */

			0x0	/* apps_v4_rt_nhash_size; */

			0x1ffc	/* apps_v6_rt_hash_ofst; */

			0x0	/* apps_v6_rt_hash_size; */

			0x1ffc	/* apps_v6_rt_nhash_ofst; */

			0x0	/* apps_v6_rt_nhash_size; */

		>;

	};

};



&pcie_0_gdsc {