Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ca4d24f7 authored by Markos Chandras's avatar Markos Chandras Committed by Ralf Baechle
Browse files

MIPS: Malta: EVA: Rename 'eva_entry' to 'platform_eva_init'



Rename 'eva_entry' to 'platform_eva_init' as required by the new
'eva_init' macro in the eva.h header. Since this macro is now used
in a platform dependent way, it must not depend on its caller so move
the t1 register initialization inside this macro. Also set the .reorder
assembler option in case the caller may have previously set .noreorder.
This may allow a few assembler optimizations. Finally include missing
headers and document the register usage for this macro.

Reviewed-by: default avatarPaul Burton <paul.burton@imgtec.com>
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/7423/


Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
parent f85b71ce
Loading
Loading
Loading
Loading
+16 −6
Original line number Diff line number Diff line
@@ -10,14 +10,15 @@
#ifndef __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
#define __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H

#include <asm/regdef.h>
#include <asm/mipsregs.h>

	/*
	 * Prepare segments for EVA boot:
	 *
	 * This is in case the processor boots in legacy configuration
	 * (SI_EVAReset is de-asserted and CONFIG5.K == 0)
	 *
	 * On entry, t1 is loaded with CP0_CONFIG
	 *
	 * ========================= Mappings =============================
	 * Virtual memory           Physical memory           Mapping
	 * 0x00000000 - 0x7fffffff  0x80000000 - 0xfffffffff   MUSUK (kuseg)
@@ -30,12 +31,20 @@
	 *
	 *
	 * Lowmem is expanded to 2GB
	 *
	 * The following code uses the t0, t1, t2 and ra registers without
	 * previously preserving them.
	 *
	 */
	.macro	eva_entry
	.macro	platform_eva_init

	.set	push
	.set	reorder
	/*
	 * Get Config.K0 value and use it to program
	 * the segmentation registers
	 */
	mfc0    t1, CP0_CONFIG
	andi	t1, 0x7 /* CCA */
	move	t2, t1
	ins	t2, t1, 16, 3
@@ -77,6 +86,8 @@
	mtc0    t0, $16, 5
	sync
	jal	mips_ihb

	.set	pop
	.endm

	.macro	kernel_entry_setup
@@ -95,7 +106,7 @@
	sll     t0, t0, 6   /* SC bit */
	bgez    t0, 9f

	eva_entry
	platform_eva_init
	b       0f
9:
	/* Assume we came from YAMON... */
@@ -127,8 +138,7 @@
#ifdef CONFIG_EVA
	sync
	ehb
	mfc0    t1, CP0_CONFIG
	eva_entry
	platform_eva_init
#endif
	.endm