Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c9af5b76 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'omap-for-v3.7-rc4/fixes-signed' of... 

Merge tag 'omap-for-v3.7-rc4/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

From Tony Lindgren <tony@atomide.com>:

Minor OMAP PM and hwmod fixes for v3.7-rc series via
Kevin Hilman and Paul Walmsley.

* tag 'omap-for-v3.7-rc4/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  ARM: OMAP4: PM: fix regulator name for VDD_MPU
  ARM: OMAP4: hwmod data: do not enable or reset the McPDM during kernel init
  ARM: OMAP2+: hwmod: add flag to prevent hwmod code from touching IP block during init
  ARM: OMAP: hwmod: wait for sysreset complete after enabling hwmod
  ARM: OMAP2+: clockdomain: Fix OMAP4 ISS clk domain to support only SWSUP
  ARM: OMAP2+: PM: add missing newline to VC warning message

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 69178dfe 5dfcb3b5

arch/arm/mach-omap2/clockdomains44xx_data.c

+1 −1
Original line number Diff line number Diff line
@@ -359,7 +359,7 @@ static struct clockdomain iss_44xx_clkdm = { 
	.clkdm_offs	  = OMAP4430_CM2_CAM_CAM_CDOFFS,

	.wkdep_srcs	  = iss_wkup_sleep_deps,

	.sleepdep_srcs	  = iss_wkup_sleep_deps,

	.flags		  = CLKDM_CAN_HWSUP_SWSUP,

	.flags		  = CLKDM_CAN_SWSUP,

};



static struct clockdomain l3_dss_44xx_clkdm = {

arch/arm/mach-omap2/omap_hwmod.c

+49 −14
Original line number Diff line number Diff line
@@ -421,6 +421,38 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v) 
	return 0;

}



/**

 * _wait_softreset_complete - wait for an OCP softreset to complete

 * @oh: struct omap_hwmod * to wait on

 *

 * Wait until the IP block represented by @oh reports that its OCP

 * softreset is complete.  This can be triggered by software (see

 * _ocp_softreset()) or by hardware upon returning from off-mode (one

 * example is HSMMC).  Waits for up to MAX_MODULE_SOFTRESET_WAIT

 * microseconds.  Returns the number of microseconds waited.

 */

static int _wait_softreset_complete(struct omap_hwmod *oh)

{

	struct omap_hwmod_class_sysconfig *sysc;

	u32 softrst_mask;

	int c = 0;



	sysc = oh->class->sysc;



	if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)

		omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)

				   & SYSS_RESETDONE_MASK),

				  MAX_MODULE_SOFTRESET_WAIT, c);

	else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {

		softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);

		omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)

				    & softrst_mask),

				  MAX_MODULE_SOFTRESET_WAIT, c);

	}



	return c;

}



/**

 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v

 * @oh: struct omap_hwmod *
@@ -1282,6 +1314,18 @@ static void _enable_sysc(struct omap_hwmod *oh) 
	if (!oh->class->sysc)

		return;



	/*

	 * Wait until reset has completed, this is needed as the IP

	 * block is reset automatically by hardware in some cases

	 * (off-mode for example), and the drivers require the

	 * IP to be ready when they access it

	 */

	if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)

		_enable_optional_clocks(oh);

	_wait_softreset_complete(oh);

	if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)

		_disable_optional_clocks(oh);



	v = oh->_sysc_cache;

	sf = oh->class->sysc->sysc_flags;
@@ -1804,7 +1848,7 @@ static int _am33xx_disable_module(struct omap_hwmod *oh) 
 */

static int _ocp_softreset(struct omap_hwmod *oh)

{

	u32 v, softrst_mask;

	u32 v;

	int c = 0;

	int ret = 0;
@@ -1834,19 +1878,7 @@ static int _ocp_softreset(struct omap_hwmod *oh) 
	if (oh->class->sysc->srst_udelay)

		udelay(oh->class->sysc->srst_udelay);



	if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)

		omap_test_timeout((omap_hwmod_read(oh,

						    oh->class->sysc->syss_offs)

				   & SYSS_RESETDONE_MASK),

				  MAX_MODULE_SOFTRESET_WAIT, c);

	else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {

		softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);

		omap_test_timeout(!(omap_hwmod_read(oh,

						     oh->class->sysc->sysc_offs)

				   & softrst_mask),

				  MAX_MODULE_SOFTRESET_WAIT, c);

	}



	c = _wait_softreset_complete(oh);

	if (c == MAX_MODULE_SOFTRESET_WAIT)

		pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",

			   oh->name, MAX_MODULE_SOFTRESET_WAIT);
@@ -2352,6 +2384,9 @@ static int __init _setup_reset(struct omap_hwmod *oh) 
	if (oh->_state != _HWMOD_STATE_INITIALIZED)

		return -EINVAL;



	if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)

		return -EPERM;



	if (oh->rst_lines_cnt == 0) {

		r = _enable(oh);

		if (r) {

arch/arm/mach-omap2/omap_hwmod_44xx_data.c

+8 −0
Original line number Diff line number Diff line
@@ -2126,6 +2126,14 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { 
	.name		= "mcpdm",

	.class		= &omap44xx_mcpdm_hwmod_class,

	.clkdm_name	= "abe_clkdm",

	/*

	 * It's suspected that the McPDM requires an off-chip main

	 * functional clock, controlled via I2C.  This IP block is

	 * currently reset very early during boot, before I2C is

	 * available, so it doesn't seem that we have any choice in

	 * the kernel other than to avoid resetting it.

	 */

	.flags		= HWMOD_EXT_OPT_MAIN_CLK,

	.mpu_irqs	= omap44xx_mcpdm_irqs,

	.sdma_reqs	= omap44xx_mcpdm_sdma_reqs,

	.main_clk	= "mcpdm_fck",

arch/arm/mach-omap2/twl-common.c

+1 −1
Original line number Diff line number Diff line
@@ -366,7 +366,7 @@ static struct regulator_init_data omap4_clk32kg_idata = { 
};



static struct regulator_consumer_supply omap4_vdd1_supply[] = {

	REGULATOR_SUPPLY("vcc", "mpu.0"),

	REGULATOR_SUPPLY("vcc", "cpu0"),

};



static struct regulator_consumer_supply omap4_vdd2_supply[] = {

arch/arm/mach-omap2/vc.c

+1 −1
Original line number Diff line number Diff line
@@ -264,7 +264,7 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm) 


	if (initialized) {

		if (voltdm->pmic->i2c_high_speed != i2c_high_speed)

			pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",

			pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).\n",

				__func__, voltdm->name, i2c_high_speed);

		return;

	}