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Commit c9a3429b authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

Merge branch 'topic/vsp1' into patchwork 

* topic/vsp1: (36 commits)
  [media] v4l: vsp1: wpf: Add flipping support
  [media] v4l: vsp1: rwpf: Support runtime modification of controls
  [media] v4l: vsp1: Simplify alpha propagation
  [media] v4l: vsp1: clu: Support runtime modification of controls
  [media] v4l: vsp1: lut: Support runtime modification of controls
  [media] v4l: vsp1: Support runtime modification of controls
  [media] v4l: vsp1: Add Cubic Look Up Table (CLU) support
  [media] v4l: vsp1: lut: Expose configuration through a control
  [media] v4l: vsp1: lut: Initialize the mutex
  [media] v4l: vsp1: dl: Don't free fragments with interrupts disabled
  [media] v4l: vsp1: Set entities functions
  [media] v4l: vsp1: Don't create LIF entity when the userspace API is enabled
  [media] v4l: vsp1: Don't register media device when userspace API is disabled
  [media] v4l: vsp1: Base link creation on availability of entities
  [media] media: Add video statistics computation functions
  [media] media: Add video processing entity functions
  [media] v4l: vsp1: sru: Fix intensity control ID
  [media] v4l: vsp1: Stop the pipeline upon the first STREAMOFF
  [media] v4l: vsp1: Constify operation structures
  [media] v4l: vsp1: pipe: Fix typo in comment
  ...
parents 85c30a72 894dde5c

Documentation/DocBook/media/v4l/media-types.xml

+64 −0
Original line number Diff line number Diff line
@@ -121,6 +121,70 @@ 
	    <entry><constant>MEDIA_ENT_F_AUDIO_MIXER</constant></entry>

	    <entry>Audio Mixer Function Entity.</entry>

	  </row>

	  <row>

	    <entry><constant>MEDIA_ENT_F_PROC_VIDEO_COMPOSER</constant></entry>

	    <entry>Video composer (blender). An entity capable of video

		   composing must have at least two sink pads and one source

		   pad, and composes input video frames onto output video

		   frames. Composition can be performed using alpha blending,

		   color keying, raster operations (ROP), stitching or any other

		   means.

	    </entry>

	  </row>

	  <row>

	    <entry><constant>MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER</constant></entry>

	    <entry>Video pixel formatter. An entity capable of pixel formatting

		   must have at least one sink pad and one source pad. Read

		   pixel formatters read pixels from memory and perform a subset

		   of unpacking, cropping, color keying, alpha multiplication

		   and pixel encoding conversion. Write pixel formatters perform

		   a subset of dithering, pixel encoding conversion and packing

		   and write pixels to memory.

	    </entry>

	  </row>

	  <row>

	    <entry><constant>MEDIA_ENT_F_PROC_VIDEO_PIXEL_ENC_CONV</constant></entry>

	    <entry>Video pixel encoding converter. An entity capable of pixel

		   enconding conversion must have at least one sink pad and one

		   source pad, and convert the encoding of pixels received on

		   its sink pad(s) to a different encoding output on its source

		   pad(s). Pixel encoding conversion includes but isn't limited

		   to RGB to/from HSV, RGB to/from YUV and CFA (Bayer) to RGB

		   conversions.

	    </entry>

	  </row>

	  <row>

	    <entry><constant>MEDIA_ENT_F_PROC_VIDEO_LUT</constant></entry>

	    <entry>Video look-up table. An entity capable of video lookup table

		   processing must have one sink pad and one source pad. It uses

		   the values of the pixels received on its sink pad to look up

		   entries in internal tables and output them on its source pad.

		   The lookup processing can be performed on all components

		   separately or combine them for multi-dimensional table

		   lookups.

	    </entry>

	  </row>

	  <row>

	    <entry><constant>MEDIA_ENT_F_PROC_VIDEO_SCALER</constant></entry>

	    <entry>Video scaler. An entity capable of video scaling must have

		   at least one sink pad and one source pad, and scale the

		   video frame(s) received on its sink pad(s) to a different

		   resolution output on its source pad(s). The range of

		   supported scaling ratios is entity-specific and can differ

		   between the horizontal and vertical directions (in particular

		   scaling can be supported in one direction only). Binning and

		   skipping are considered as scaling.

	    </entry>

	  </row>

	  <row>

	    <entry><constant>MEDIA_ENT_F_PROC_VIDEO_STATISTICS</constant></entry>

	    <entry>Video statistics computation (histogram, 3A, ...). An entity

		   capable of statistics computation must have one sink pad and

		   one source pad. It computes statistics over the frames

		   received on its sink pad and outputs the statistics data on

		   its source pad.

	    </entry>

	  </row>

	</tbody>

      </tgroup>

    </table>

Documentation/devicetree/bindings/media/renesas,fcp.txt

0 → 100644
+32 −0
Original line number Diff line number Diff line 
Renesas R-Car Frame Compression Processor (FCP)

-----------------------------------------------



The FCP is a companion module of video processing modules in the Renesas R-Car

Gen3 SoCs. It provides data compression and decompression, data caching, and

conversion of AXI transactions in order to reduce the memory bandwidth.



There are three types of FCP: FCP for Codec (FCPC), FCP for VSP (FCPV) and FCP

for FDP (FCPF). Their configuration and behaviour depend on the module they

are paired with. These DT bindings currently support the FCPV only.



 - compatible: Must be one or more of the following



   - "renesas,r8a7795-fcpv" for R8A7795 (R-Car H3) compatible 'FCP for VSP'

   - "renesas,fcpv" for generic compatible 'FCP for VSP'



   When compatible with the generic version, nodes must list the

   SoC-specific version corresponding to the platform first, followed by the

   family-specific and/or generic versions.



 - reg: the register base and size for the device registers

 - clocks: Reference to the functional clock





Device node example

-------------------



	fcpvd1: fcp@fea2f000 {

		compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";

		reg = <0 0xfea2f000 0 0x200>;

		clocks = <&cpg CPG_MOD 602>;

	};

Documentation/devicetree/bindings/media/renesas,vsp1.txt

+5 −0
Original line number Diff line number Diff line
@@ -14,6 +14,11 @@ Required properties: 
  - interrupts: VSP interrupt specifier.

  - clocks: A phandle + clock-specifier pair for the VSP functional clock.



Optional properties:



  - renesas,fcp: A phandle referencing the FCP that handles memory accesses

                 for the VSP. Not needed on Gen2, mandatory on Gen3.





Example: R8A7790 (R-Car H2) VSP1-S node

MAINTAINERS

+10 −0
Original line number Diff line number Diff line
@@ -7343,6 +7343,16 @@ L: linux-iio@vger.kernel.org 
S:	Maintained

F:	drivers/iio/potentiometer/mcp4531.c



MEDIA DRIVERS FOR RENESAS - FCP

M:	Laurent Pinchart <laurent.pinchart@ideasonboard.com>

L:	linux-media@vger.kernel.org

L:	linux-renesas-soc@vger.kernel.org

T:	git git://linuxtv.org/media_tree.git

S:	Supported

F:	Documentation/devicetree/bindings/media/renesas,fcp.txt

F:	drivers/media/platform/rcar-fcp.c

F:	include/media/rcar-fcp.h



MEDIA DRIVERS FOR RENESAS - VSP1

M:	Laurent Pinchart <laurent.pinchart@ideasonboard.com>

L:	linux-media@vger.kernel.org

drivers/gpu/drm/rcar-du/rcar_du_vsp.c

+25 −20
Original line number Diff line number Diff line
@@ -148,40 +148,39 @@ static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane) 
	struct rcar_du_vsp_plane_state *state =

		to_rcar_vsp_plane_state(plane->plane.state);

	struct drm_framebuffer *fb = plane->plane.state->fb;

	struct v4l2_rect src;

	struct v4l2_rect dst;

	dma_addr_t paddr[2] = { 0, };

	u32 pixelformat = 0;

	struct vsp1_du_atomic_config cfg = {

		.pixelformat = 0,

		.pitch = fb->pitches[0],

		.alpha = state->alpha,

		.zpos = state->zpos,

	};

	unsigned int i;



	src.left = state->state.src_x >> 16;

	src.top = state->state.src_y >> 16;

	src.width = state->state.src_w >> 16;

	src.height = state->state.src_h >> 16;

	cfg.src.left = state->state.src_x >> 16;

	cfg.src.top = state->state.src_y >> 16;

	cfg.src.width = state->state.src_w >> 16;

	cfg.src.height = state->state.src_h >> 16;



	dst.left = state->state.crtc_x;

	dst.top = state->state.crtc_y;

	dst.width = state->state.crtc_w;

	dst.height = state->state.crtc_h;

	cfg.dst.left = state->state.crtc_x;

	cfg.dst.top = state->state.crtc_y;

	cfg.dst.width = state->state.crtc_w;

	cfg.dst.height = state->state.crtc_h;



	for (i = 0; i < state->format->planes; ++i) {

		struct drm_gem_cma_object *gem;



		gem = drm_fb_cma_get_gem_obj(fb, i);

		paddr[i] = gem->paddr + fb->offsets[i];

		cfg.mem[i] = gem->paddr + fb->offsets[i];

	}



	for (i = 0; i < ARRAY_SIZE(formats_kms); ++i) {

		if (formats_kms[i] == state->format->fourcc) {

			pixelformat = formats_v4l2[i];

			cfg.pixelformat = formats_v4l2[i];

			break;

		}

	}



	WARN_ON(!pixelformat);



	vsp1_du_atomic_update(plane->vsp->vsp, plane->index, pixelformat,

			      fb->pitches[0], paddr, &src, &dst);

	vsp1_du_atomic_update(plane->vsp->vsp, plane->index, &cfg);

}



static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane,
@@ -220,8 +219,7 @@ static void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane, 
	if (plane->state->crtc)

		rcar_du_vsp_plane_setup(rplane);

	else

		vsp1_du_atomic_update(rplane->vsp->vsp, rplane->index, 0, 0, 0,

				      NULL, NULL);

		vsp1_du_atomic_update(rplane->vsp->vsp, rplane->index, NULL);

}



static const struct drm_plane_helper_funcs rcar_du_vsp_plane_helper_funcs = {
@@ -269,6 +267,7 @@ static void rcar_du_vsp_plane_reset(struct drm_plane *plane) 
		return;



	state->alpha = 255;

	state->zpos = plane->type == DRM_PLANE_TYPE_PRIMARY ? 0 : 1;



	plane->state = &state->state;

	plane->state->plane = plane;
@@ -283,6 +282,8 @@ static int rcar_du_vsp_plane_atomic_set_property(struct drm_plane *plane, 


	if (property == rcdu->props.alpha)

		rstate->alpha = val;

	else if (property == rcdu->props.zpos)

		rstate->zpos = val;

	else

		return -EINVAL;
@@ -299,6 +300,8 @@ static int rcar_du_vsp_plane_atomic_get_property(struct drm_plane *plane, 


	if (property == rcdu->props.alpha)

		*val = rstate->alpha;

	else if (property == rcdu->props.zpos)

		*val = rstate->zpos;

	else

		return -EINVAL;
@@ -378,6 +381,8 @@ int rcar_du_vsp_init(struct rcar_du_vsp *vsp) 


		drm_object_attach_property(&plane->plane.base,

					   rcdu->props.alpha, 255);

		drm_object_attach_property(&plane->plane.base,

					   rcdu->props.zpos, 1);

	}



	return 0;