Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c90fa966 authored by Venkat Gopalakrishnan's avatar Venkat Gopalakrishnan Committed by Xiaonian Wang
Browse files

mmc: sdhci: Poll for register status much tightly 



On fast path, waiting for 1ms interval to poll registers cause
performance degradation. Also having 1ms delays for polling with
interrupts disabled cause considerable system latencies, hence
poll at 1us interval.

Change-Id: I40113ccf56050b3c46604112846e9b37b254d2be
Signed-off-by: default avatarVenkat Gopalakrishnan <venkatg@codeaurora.org>
[xiaonian@codeaurora.org: fix trivial merge conflict]
Signed-off-by: default avatarXiaonian Wang <xiaonian@codeaurora.org>
parent e8b0de9f

drivers/mmc/host/sdhci.c

+4 −4
Original line number Diff line number Diff line
@@ -243,7 +243,7 @@ void sdhci_reset(struct sdhci_host *host, u8 mask) 
	}



	/* Wait max 100 ms */

	timeout = 100;

	timeout = 100000;



	if (host->ops->check_power_status && host->pwr &&

	    (mask & SDHCI_RESET_ALL))
@@ -1185,7 +1185,7 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) 
		cmd->flags |= MMC_RSP_BUSY;



	/* Wait max 10 ms */

	timeout = 10;

	timeout = 10000;



	mask = SDHCI_CMD_INHIBIT;

	if (sdhci_data_line_cmd(cmd))
@@ -1206,7 +1206,7 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) 
			return;

		}

		timeout--;

		mdelay(1);

		udelay(1);

	}



	timeout = jiffies;
@@ -1471,7 +1471,7 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 
	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);



	/* Wait max 20 ms */

	timeout = 20;

	timeout = 20000;

	while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))

		& SDHCI_CLOCK_INT_STABLE)) {

		if (timeout == 0) {