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Commit c8def085 authored by Kukjin Kim's avatar Kukjin Kim
Browse files

ARM: S5P: Changes the definition name of default UART registers 



This patch changes the definition name of default UCON, ULCON, and
UFCON UART registers from ARCH(SoC) to Machine(Board). Because it
depends on machine.

Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 02a0456b

arch/arm/mach-s5p6440/mach-smdk6440.c

+15 −15
Original line number Original line Diff line number Diff line
@@ -41,16 +41,16 @@ 
#include <plat/adc.h>

#include <plat/adc.h>

#include <plat/ts.h>

#include <plat/ts.h>





#define S5P6440_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |	\

#define SMDK6440_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

				S3C2410_UCON_RXILEVEL |		\

				S3C2410_UCON_RXILEVEL |		\

				S3C2410_UCON_TXIRQMODE |	\

				S3C2410_UCON_TXIRQMODE |	\

				S3C2410_UCON_RXIRQMODE |	\

				S3C2410_UCON_RXIRQMODE |	\

				S3C2410_UCON_RXFIFO_TOI |	\

				S3C2410_UCON_RXFIFO_TOI |	\

				S3C2443_UCON_RXERR_IRQEN)

				S3C2443_UCON_RXERR_IRQEN)





#define S5P6440_ULCON_DEFAULT	S3C2410_LCON_CS8

#define SMDK6440_ULCON_DEFAULT	S3C2410_LCON_CS8





#define S5P6440_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |	\

#define SMDK6440_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\

				S3C2440_UFCON_TXTRIG16 |	\

				S3C2440_UFCON_TXTRIG16 |	\

				S3C2410_UFCON_RXTRIG8)

				S3C2410_UFCON_RXTRIG8)
@@ -58,30 +58,30 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = { 
	[0] = {

	[0] = {

		.hwport	     = 0,

		.hwport	     = 0,

		.flags	     = 0,

		.flags	     = 0,

		.ucon	     = S5P6440_UCON_DEFAULT,

		.ucon	     = SMDK6440_UCON_DEFAULT,

		.ulcon	     = S5P6440_ULCON_DEFAULT,

		.ulcon	     = SMDK6440_ULCON_DEFAULT,

		.ufcon	     = S5P6440_UFCON_DEFAULT,

		.ufcon	     = SMDK6440_UFCON_DEFAULT,

	},

	},

	[1] = {

	[1] = {

		.hwport	     = 1,

		.hwport	     = 1,

		.flags	     = 0,

		.flags	     = 0,

		.ucon	     = S5P6440_UCON_DEFAULT,

		.ucon	     = SMDK6440_UCON_DEFAULT,

		.ulcon	     = S5P6440_ULCON_DEFAULT,

		.ulcon	     = SMDK6440_ULCON_DEFAULT,

		.ufcon	     = S5P6440_UFCON_DEFAULT,

		.ufcon	     = SMDK6440_UFCON_DEFAULT,

	},

	},

	[2] = {

	[2] = {

		.hwport	     = 2,

		.hwport	     = 2,

		.flags	     = 0,

		.flags	     = 0,

		.ucon	     = S5P6440_UCON_DEFAULT,

		.ucon	     = SMDK6440_UCON_DEFAULT,

		.ulcon	     = S5P6440_ULCON_DEFAULT,

		.ulcon	     = SMDK6440_ULCON_DEFAULT,

		.ufcon	     = S5P6440_UFCON_DEFAULT,

		.ufcon	     = SMDK6440_UFCON_DEFAULT,

	},

	},

	[3] = {

	[3] = {

		.hwport	     = 3,

		.hwport	     = 3,

		.flags	     = 0,

		.flags	     = 0,

		.ucon	     = S5P6440_UCON_DEFAULT,

		.ucon	     = SMDK6440_UCON_DEFAULT,

		.ulcon	     = S5P6440_ULCON_DEFAULT,

		.ulcon	     = SMDK6440_ULCON_DEFAULT,

		.ufcon	     = S5P6440_UFCON_DEFAULT,

		.ufcon	     = SMDK6440_UFCON_DEFAULT,

	},

	},

};

};

arch/arm/mach-s5p6442/mach-smdk6442.c

+12 −12
Original line number Original line Diff line number Diff line
@@ -27,16 +27,16 @@ 
#include <plat/cpu.h>

#include <plat/cpu.h>





/* Following are default values for UCON, ULCON and UFCON UART registers */

/* Following are default values for UCON, ULCON and UFCON UART registers */

#define S5P6442_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

#define SMDK6442_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

				 S3C2410_UCON_RXILEVEL |	\

				 S3C2410_UCON_RXILEVEL |	\

				 S3C2410_UCON_TXIRQMODE |	\

				 S3C2410_UCON_TXIRQMODE |	\

				 S3C2410_UCON_RXIRQMODE |	\

				 S3C2410_UCON_RXIRQMODE |	\

				 S3C2410_UCON_RXFIFO_TOI |	\

				 S3C2410_UCON_RXFIFO_TOI |	\

				 S3C2443_UCON_RXERR_IRQEN)

				 S3C2443_UCON_RXERR_IRQEN)





#define S5P6442_ULCON_DEFAULT	S3C2410_LCON_CS8

#define SMDK6442_ULCON_DEFAULT	S3C2410_LCON_CS8





#define S5P6442_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\

#define SMDK6442_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\

				 S5PV210_UFCON_TXTRIG4 |	\

				 S5PV210_UFCON_TXTRIG4 |	\

				 S5PV210_UFCON_RXTRIG4)

				 S5PV210_UFCON_RXTRIG4)
@@ -44,23 +44,23 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = { 
	[0] = {

	[0] = {

		.hwport		= 0,

		.hwport		= 0,

		.flags		= 0,

		.flags		= 0,

		.ucon		= S5P6442_UCON_DEFAULT,

		.ucon		= SMDK6442_UCON_DEFAULT,

		.ulcon		= S5P6442_ULCON_DEFAULT,

		.ulcon		= SMDK6442_ULCON_DEFAULT,

		.ufcon		= S5P6442_UFCON_DEFAULT,

		.ufcon		= SMDK6442_UFCON_DEFAULT,

	},

	},

	[1] = {

	[1] = {

		.hwport		= 1,

		.hwport		= 1,

		.flags		= 0,

		.flags		= 0,

		.ucon		= S5P6442_UCON_DEFAULT,

		.ucon		= SMDK6442_UCON_DEFAULT,

		.ulcon		= S5P6442_ULCON_DEFAULT,

		.ulcon		= SMDK6442_ULCON_DEFAULT,

		.ufcon		= S5P6442_UFCON_DEFAULT,

		.ufcon		= SMDK6442_UFCON_DEFAULT,

	},

	},

	[2] = {

	[2] = {

		.hwport		= 2,

		.hwport		= 2,

		.flags		= 0,

		.flags		= 0,

		.ucon		= S5P6442_UCON_DEFAULT,

		.ucon		= SMDK6442_UCON_DEFAULT,

		.ulcon		= S5P6442_ULCON_DEFAULT,

		.ulcon		= SMDK6442_ULCON_DEFAULT,

		.ufcon		= S5P6442_UFCON_DEFAULT,

		.ufcon		= SMDK6442_UFCON_DEFAULT,

	},

	},

};

};

arch/arm/mach-s5pc100/mach-smdkc100.c

+15 −15
Original line number Original line Diff line number Diff line
@@ -44,16 +44,16 @@ 
#include <plat/iic.h>

#include <plat/iic.h>





/* Following are default values for UCON, ULCON and UFCON UART registers */

/* Following are default values for UCON, ULCON and UFCON UART registers */

#define S5PC100_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

#define SMDKC100_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

				 S3C2410_UCON_RXILEVEL |	\

				 S3C2410_UCON_RXILEVEL |	\

				 S3C2410_UCON_TXIRQMODE |	\

				 S3C2410_UCON_TXIRQMODE |	\

				 S3C2410_UCON_RXIRQMODE |	\

				 S3C2410_UCON_RXIRQMODE |	\

				 S3C2410_UCON_RXFIFO_TOI |	\

				 S3C2410_UCON_RXFIFO_TOI |	\

				 S3C2443_UCON_RXERR_IRQEN)

				 S3C2443_UCON_RXERR_IRQEN)





#define S5PC100_ULCON_DEFAULT	S3C2410_LCON_CS8

#define SMDKC100_ULCON_DEFAULT	S3C2410_LCON_CS8





#define S5PC100_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\

#define SMDKC100_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\

				 S3C2440_UFCON_RXTRIG8 |	\

				 S3C2440_UFCON_RXTRIG8 |	\

				 S3C2440_UFCON_TXTRIG16)

				 S3C2440_UFCON_TXTRIG16)
@@ -61,30 +61,30 @@ static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = { 
	[0] = {

	[0] = {

		.hwport	     = 0,

		.hwport	     = 0,

		.flags	     = 0,

		.flags	     = 0,

		.ucon	     = S5PC100_UCON_DEFAULT,

		.ucon	     = SMDKC100_UCON_DEFAULT,

		.ulcon	     = S5PC100_ULCON_DEFAULT,

		.ulcon	     = SMDKC100_ULCON_DEFAULT,

		.ufcon	     = S5PC100_UFCON_DEFAULT,

		.ufcon	     = SMDKC100_UFCON_DEFAULT,

	},

	},

	[1] = {

	[1] = {

		.hwport	     = 1,

		.hwport	     = 1,

		.flags	     = 0,

		.flags	     = 0,

		.ucon	     = S5PC100_UCON_DEFAULT,

		.ucon	     = SMDKC100_UCON_DEFAULT,

		.ulcon	     = S5PC100_ULCON_DEFAULT,

		.ulcon	     = SMDKC100_ULCON_DEFAULT,

		.ufcon	     = S5PC100_UFCON_DEFAULT,

		.ufcon	     = SMDKC100_UFCON_DEFAULT,

	},

	},

	[2] = {

	[2] = {

		.hwport	     = 2,

		.hwport	     = 2,

		.flags	     = 0,

		.flags	     = 0,

		.ucon	     = S5PC100_UCON_DEFAULT,

		.ucon	     = SMDKC100_UCON_DEFAULT,

		.ulcon	     = S5PC100_ULCON_DEFAULT,

		.ulcon	     = SMDKC100_ULCON_DEFAULT,

		.ufcon	     = S5PC100_UFCON_DEFAULT,

		.ufcon	     = SMDKC100_UFCON_DEFAULT,

	},

	},

	[3] = {

	[3] = {

		.hwport	     = 3,

		.hwport	     = 3,

		.flags	     = 0,

		.flags	     = 0,

		.ucon	     = S5PC100_UCON_DEFAULT,

		.ucon	     = SMDKC100_UCON_DEFAULT,

		.ulcon	     = S5PC100_ULCON_DEFAULT,

		.ulcon	     = SMDKC100_ULCON_DEFAULT,

		.ufcon	     = S5PC100_UFCON_DEFAULT,

		.ufcon	     = SMDKC100_UFCON_DEFAULT,

	},

	},

};

};

arch/arm/mach-s5pv210/mach-aquila.c

+15 −15
Original line number Original line Diff line number Diff line
@@ -30,16 +30,16 @@ 
#include <plat/fb.h>

#include <plat/fb.h>





/* Following are default values for UCON, ULCON and UFCON UART registers */

/* Following are default values for UCON, ULCON and UFCON UART registers */

#define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

#define AQUILA_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

				 S3C2410_UCON_RXILEVEL |	\

				 S3C2410_UCON_RXILEVEL |	\

				 S3C2410_UCON_TXIRQMODE |	\

				 S3C2410_UCON_TXIRQMODE |	\

				 S3C2410_UCON_RXIRQMODE |	\

				 S3C2410_UCON_RXIRQMODE |	\

				 S3C2410_UCON_RXFIFO_TOI |	\

				 S3C2410_UCON_RXFIFO_TOI |	\

				 S3C2443_UCON_RXERR_IRQEN)

				 S3C2443_UCON_RXERR_IRQEN)





#define S5PV210_ULCON_DEFAULT	S3C2410_LCON_CS8

#define AQUILA_ULCON_DEFAULT	S3C2410_LCON_CS8





#define S5PV210_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\

#define AQUILA_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\

				 S5PV210_UFCON_TXTRIG4 |	\

				 S5PV210_UFCON_TXTRIG4 |	\

				 S5PV210_UFCON_RXTRIG4)

				 S5PV210_UFCON_RXTRIG4)
@@ -47,30 +47,30 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { 
	[0] = {

	[0] = {

		.hwport		= 0,

		.hwport		= 0,

		.flags		= 0,

		.flags		= 0,

		.ucon		= S5PV210_UCON_DEFAULT,

		.ucon		= AQUILA_UCON_DEFAULT,

		.ulcon		= S5PV210_ULCON_DEFAULT,

		.ulcon		= AQUILA_ULCON_DEFAULT,

		.ufcon		= S5PV210_UFCON_DEFAULT,

		.ufcon		= AQUILA_UFCON_DEFAULT,

	},

	},

	[1] = {

	[1] = {

		.hwport		= 1,

		.hwport		= 1,

		.flags		= 0,

		.flags		= 0,

		.ucon		= S5PV210_UCON_DEFAULT,

		.ucon		= AQUILA_UCON_DEFAULT,

		.ulcon		= S5PV210_ULCON_DEFAULT,

		.ulcon		= AQUILA_ULCON_DEFAULT,

		.ufcon		= S5PV210_UFCON_DEFAULT,

		.ufcon		= AQUILA_UFCON_DEFAULT,

	},

	},

	[2] = {

	[2] = {

		.hwport		= 2,

		.hwport		= 2,

		.flags		= 0,

		.flags		= 0,

		.ucon		= S5PV210_UCON_DEFAULT,

		.ucon		= AQUILA_UCON_DEFAULT,

		.ulcon		= S5PV210_ULCON_DEFAULT,

		.ulcon		= AQUILA_ULCON_DEFAULT,

		.ufcon		= S5PV210_UFCON_DEFAULT,

		.ufcon		= AQUILA_UFCON_DEFAULT,

	},

	},

	[3] = {

	[3] = {

		.hwport		= 3,

		.hwport		= 3,

		.flags		= 0,

		.flags		= 0,

		.ucon		= S5PV210_UCON_DEFAULT,

		.ucon		= AQUILA_UCON_DEFAULT,

		.ulcon		= S5PV210_ULCON_DEFAULT,

		.ulcon		= AQUILA_ULCON_DEFAULT,

		.ufcon		= S5PV210_UFCON_DEFAULT,

		.ufcon		= AQUILA_UFCON_DEFAULT,

	},

	},

};

};

arch/arm/mach-s5pv210/mach-goni.c

+15 −15
Original line number Original line Diff line number Diff line
@@ -27,16 +27,16 @@ 
#include <plat/cpu.h>

#include <plat/cpu.h>





/* Following are default values for UCON, ULCON and UFCON UART registers */

/* Following are default values for UCON, ULCON and UFCON UART registers */

#define S5PV210_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

#define GONI_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\

				 S3C2410_UCON_RXILEVEL |	\

				 S3C2410_UCON_RXILEVEL |	\

				 S3C2410_UCON_TXIRQMODE |	\

				 S3C2410_UCON_TXIRQMODE |	\

				 S3C2410_UCON_RXIRQMODE |	\

				 S3C2410_UCON_RXIRQMODE |	\

				 S3C2410_UCON_RXFIFO_TOI |	\

				 S3C2410_UCON_RXFIFO_TOI |	\

				 S3C2443_UCON_RXERR_IRQEN)

				 S3C2443_UCON_RXERR_IRQEN)





#define S5PV210_ULCON_DEFAULT	S3C2410_LCON_CS8

#define GONI_ULCON_DEFAULT	S3C2410_LCON_CS8





#define S5PV210_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\

#define GONI_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\

				 S5PV210_UFCON_TXTRIG4 |	\

				 S5PV210_UFCON_TXTRIG4 |	\

				 S5PV210_UFCON_RXTRIG4)

				 S5PV210_UFCON_RXTRIG4)
@@ -44,30 +44,30 @@ static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = { 
	[0] = {

	[0] = {

		.hwport		= 0,

		.hwport		= 0,

		.flags		= 0,

		.flags		= 0,

		.ucon		= S5PV210_UCON_DEFAULT,

		.ucon		= GONI_UCON_DEFAULT,

		.ulcon		= S5PV210_ULCON_DEFAULT,

		.ulcon		= GONI_ULCON_DEFAULT,

		.ufcon		= S5PV210_UFCON_DEFAULT,

		.ufcon		= GONI_UFCON_DEFAULT,

	},

	},

	[1] = {

	[1] = {

		.hwport		= 1,

		.hwport		= 1,

		.flags		= 0,

		.flags		= 0,

		.ucon		= S5PV210_UCON_DEFAULT,

		.ucon		= GONI_UCON_DEFAULT,

		.ulcon		= S5PV210_ULCON_DEFAULT,

		.ulcon		= GONI_ULCON_DEFAULT,

		.ufcon		= S5PV210_UFCON_DEFAULT,

		.ufcon		= GONI_UFCON_DEFAULT,

	},

	},

	[2] = {

	[2] = {

		.hwport		= 2,

		.hwport		= 2,

		.flags		= 0,

		.flags		= 0,

		.ucon		= S5PV210_UCON_DEFAULT,

		.ucon		= GONI_UCON_DEFAULT,

		.ulcon		= S5PV210_ULCON_DEFAULT,

		.ulcon		= GONI_ULCON_DEFAULT,

		.ufcon		= S5PV210_UFCON_DEFAULT,

		.ufcon		= GONI_UFCON_DEFAULT,

	},

	},

	[3] = {

	[3] = {

		.hwport		= 3,

		.hwport		= 3,

		.flags		= 0,

		.flags		= 0,

		.ucon		= S5PV210_UCON_DEFAULT,

		.ucon		= GONI_UCON_DEFAULT,

		.ulcon		= S5PV210_ULCON_DEFAULT,

		.ulcon		= GONI_ULCON_DEFAULT,

		.ufcon		= S5PV210_UFCON_DEFAULT,

		.ufcon		= GONI_UFCON_DEFAULT,

	},

	},

};

};