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Commit c822ad53 authored by Sunil Paidimarri's avatar Sunil Paidimarri
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Documentation: Add doc for smmu EMAC support in sdxpoorwills



Add DT bindings documentation for EMAC smmu support.

Change-Id: I37fea9e7bb898dcb3395975ed19fd86ed96ff2eb
CRs-Fixed: 2236527
Acked-by: default avatarNisha Menon <nmenon@qti.qualcomm.com>
Signed-off-by: default avatarSunil Paidimarri <hisunil@codeaurora.org>
parent 34339681
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+17 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ emac_hw node:
- reg: Offset and length of the register regions for the mac and io-macro
- interrupts: Interrupt number used by this controller
- io-macro-info: Internal io-macro-info
- emac_emb_smmu: Internal emac smmu node

Optional:
- qcom,msm-bus,name: String representing the client-name
@@ -20,16 +21,25 @@ Optional:
                             in KBps, instantaneous bandwidth in KBps
qcom,bus-vector-names: specifies string IDs for the corresponding bus vectors
                       in the same order as qcom,msm-bus,vectors-KBps property.
- qcom,arm-smmu: Boolean, if present enables EMAC SMMU support in sdxpoorwills.

Internal io-macro-info:
- io-macro-bypass-mode: <0 or 1> internal or external delay configuration
- io-interface: <rgmii/mii/rmii> PHY interface used

Internal emac_emb_smmu:
- compatible: Should be "qcom,emac-smmu-embedded".
- qcom,smmu-s1-bypass: Boolean, if present S1 bypass is enabled.
- iommus: Includes the <&smmu_phandle stream_id size> pair for each context
			bank.
- qcom,iova-mapping: <starting_address size> of the smmu context bank.

Example:

soc {
	emac_hw: qcom,emac@00020000 {
			compatible = "qcom,emac-dwc-eqos";
			qcom,arm-smmu;
			reg = <0x20000 0x10000>,
				  <0x36000 0x100>;
			reg-names = "emac-base", "rgmii-base";
@@ -57,5 +67,12 @@ soc {
				io-macro-bypass-mode = <0>;
				io-interface = "rgmii";
			};

			emac_emb_smmu: emac_emb_smmu {
				compatible = "qcom,emac-smmu-embedded";
				qcom,smmu-s1-bypass;
				iommus = <&apps_smmu 0x220 0xf>;
				qcom,iova-mapping = <0x80000000 0x40000000>;
			};
		};
}