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Commit c7984f4e authored by Dan Williams's avatar Dan Williams
Browse files

ioat: define descriptor control bit-field 



This cleans up a mess of and'ing and or'ing bit definitions, and allows
simple assignments from the specified dma_ctrl_flags parameter.

Signed-off-by: default avatarMaciej Sosnowski <maciej.sosnowski@intel.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 77867fff

drivers/dma/ioat/dma.c

+16 −12
Original line number Diff line number Diff line
@@ -472,9 +472,9 @@ static dma_cookie_t ioat1_tx_submit(struct dma_async_tx_descriptor *tx) 
		return -ENOMEM;

	}



	hw->ctl = IOAT_DMA_DESCRIPTOR_CTL_CP_STS;

	hw->ctl_f.compl_write = 1;

	if (first->txd.callback) {

		hw->ctl |= IOAT_DMA_DESCRIPTOR_CTL_INT_GN;

		hw->ctl_f.int_en = 1;

		if (first != new) {

			/* move callback into to last desc */

			new->txd.callback = first->txd.callback;
@@ -563,9 +563,9 @@ static dma_cookie_t ioat2_tx_submit(struct dma_async_tx_descriptor *tx) 
		return -ENOMEM;

	}



	hw->ctl |= IOAT_DMA_DESCRIPTOR_CTL_CP_STS;

	hw->ctl_f.compl_write = 1;

	if (first->txd.callback) {

		hw->ctl |= IOAT_DMA_DESCRIPTOR_CTL_INT_GN;

		hw->ctl_f.int_en = 1;

		if (first != new) {

			/* move callback into to last desc */

			new->txd.callback = first->txd.callback;
@@ -878,7 +878,8 @@ ioat2_dma_get_next_descriptor(struct ioat_dma_chan *ioat_chan) 
		noop_desc = to_ioat_desc(ioat_chan->used_desc.next);

		/* set size to non-zero value (channel returns error when size is 0) */

		noop_desc->hw->size = NULL_DESC_BUFFER_SIZE;

		noop_desc->hw->ctl = IOAT_DMA_DESCRIPTOR_NUL;

		noop_desc->hw->ctl = 0;

		noop_desc->hw->ctl_f.null = 1;

		noop_desc->hw->src_addr = 0;

		noop_desc->hw->dst_addr = 0;
@@ -1230,6 +1231,7 @@ ioat_dma_is_complete(struct dma_chan *chan, dma_cookie_t cookie, 
static void ioat_dma_start_null_desc(struct ioat_dma_chan *ioat_chan)

{

	struct ioat_desc_sw *desc;

	struct ioat_dma_descriptor *hw;



	spin_lock_bh(&ioat_chan->desc_lock);
@@ -1242,17 +1244,19 @@ static void ioat_dma_start_null_desc(struct ioat_dma_chan *ioat_chan) 
		return;

	}



	desc->hw->ctl = IOAT_DMA_DESCRIPTOR_NUL

				| IOAT_DMA_DESCRIPTOR_CTL_INT_GN

				| IOAT_DMA_DESCRIPTOR_CTL_CP_STS;

	hw = desc->hw;

	hw->ctl = 0;

	hw->ctl_f.null = 1;

	hw->ctl_f.int_en = 1;

	hw->ctl_f.compl_write = 1;

	/* set size to non-zero value (channel returns error when size is 0) */

	desc->hw->size = NULL_DESC_BUFFER_SIZE;

	desc->hw->src_addr = 0;

	desc->hw->dst_addr = 0;

	hw->size = NULL_DESC_BUFFER_SIZE;

	hw->src_addr = 0;

	hw->dst_addr = 0;

	async_tx_ack(&desc->txd);

	switch (ioat_chan->device->version) {

	case IOAT_VER_1_2:

		desc->hw->next = 0;

		hw->next = 0;

		list_add_tail(&desc->node, &ioat_chan->used_desc);



		writel(((u64) desc->txd.phys) & 0x00000000FFFFFFFF,

drivers/dma/ioat/hw.h

+18 −20
Original line number Diff line number Diff line
@@ -40,7 +40,24 @@ 


struct ioat_dma_descriptor {

	uint32_t	size;

	union {

		uint32_t ctl;

		struct {

			unsigned int int_en:1;

			unsigned int src_snoop_dis:1;

			unsigned int dest_snoop_dis:1;

			unsigned int compl_write:1;

			unsigned int fence:1;

			unsigned int null:1;

			unsigned int src_brk:1;

			unsigned int dest_brk:1;

			unsigned int bundle:1;

			unsigned int dest_dca:1;

			unsigned int hint:1;

			unsigned int rsvd2:13;

			unsigned int op:8;

		} ctl_f;

	};

	uint64_t	src_addr;

	uint64_t	dst_addr;

	uint64_t	next;
@@ -49,23 +66,4 @@ struct ioat_dma_descriptor { 
	uint64_t	user1;

	uint64_t	user2;

};



#define IOAT_DMA_DESCRIPTOR_CTL_INT_GN	0x00000001

#define IOAT_DMA_DESCRIPTOR_CTL_SRC_SN	0x00000002

#define IOAT_DMA_DESCRIPTOR_CTL_DST_SN	0x00000004

#define IOAT_DMA_DESCRIPTOR_CTL_CP_STS	0x00000008

#define IOAT_DMA_DESCRIPTOR_CTL_FRAME	0x00000010

#define IOAT_DMA_DESCRIPTOR_NUL		0x00000020

#define IOAT_DMA_DESCRIPTOR_CTL_SP_BRK	0x00000040

#define IOAT_DMA_DESCRIPTOR_CTL_DP_BRK	0x00000080

#define IOAT_DMA_DESCRIPTOR_CTL_BNDL	0x00000100

#define IOAT_DMA_DESCRIPTOR_CTL_DCA	0x00000200

#define IOAT_DMA_DESCRIPTOR_CTL_BUFHINT	0x00000400



#define IOAT_DMA_DESCRIPTOR_CTL_OPCODE_CONTEXT	0xFF000000

#define IOAT_DMA_DESCRIPTOR_CTL_OPCODE_DMA	0x00000000



#define IOAT_DMA_DESCRIPTOR_CTL_CONTEXT_DCA	0x00000001

#define IOAT_DMA_DESCRIPTOR_CTL_OPCODE_MASK	0xFF000000



#endif