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Commit c794804c authored by Samyukta Mogily's avatar Samyukta Mogily Committed by Gerrit - the friendly Code Review server
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msm: camera: Changes to handle change in sensor data rate



Changes to handle change in data rate, during change in
sensor mode, to reconfigure snps to the new data rate.

This fixes QVGA issue of camera failure on the first time
switch to QVGA.

Change-Id: I5a52c27aa00fa7497bca85b196dd71a296e8c6ac
Signed-off-by: default avatarSamyukta Mogily <smogily@codeaurora.org>
parent af1357b7
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+23 −10
Original line number Diff line number Diff line
@@ -218,6 +218,8 @@ static int msm_csiphy_snps_2_lane_config(
		}
	}

	csiphy_dev->snps_programmed_data_rate = csiphy_params->data_rate;

	if (mode == TWO_LANE_PHY_A) {
		msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_snps_reg.
			mipi_csiphy_sys_ctrl.data,
@@ -322,8 +324,11 @@ static int msm_csiphy_snps_lane_config(
		mode = AGGREGATE_MODE;
		num_lanes = 4;
		if (csiphy_dev->snps_state != NOT_CONFIGURED) {
			pr_err("%s: invalid request\n", __func__);
			return -EINVAL;
			if (csiphy_dev->snps_programmed_data_rate !=
				csiphy_params->data_rate)
				pr_err("reconfiguring snps phy");
			else
				return 0;
		}
		csiphy_dev->snps_state = CONFIGURED_AGGREGATE_MODE;
		clk_mux_reg &= ~0xff;
@@ -332,34 +337,38 @@ static int msm_csiphy_snps_lane_config(
	} else if (lane_mask == LANE_MASK_PHY_A) { /* PHY A */
		/* 2 lane config */
		num_lanes = 2;
		if (csiphy_dev->snps_state == NOT_CONFIGURED) {
		mode = TWO_LANE_PHY_A;
		if (csiphy_dev->snps_state == NOT_CONFIGURED) {
			csiphy_dev->snps_state = CONFIGURED_TWO_LANE_PHY_A;
		} else if (csiphy_dev->snps_state ==
			CONFIGURED_TWO_LANE_PHY_B) {
			/* 2 lane + 2 lane config */
			mode = TWO_LANE_PHY_A;
			csiphy_dev->snps_state = CONFIGURED_COMBO_MODE;
		} else {
			pr_err("%s: invalid request\n", __func__);
			return -EINVAL;
			if (csiphy_dev->snps_programmed_data_rate !=
				csiphy_params->data_rate)
				pr_err("reconfiguring snps phy");
			else
				return 0;
		}
		clk_mux_reg &= ~0xf;
		clk_mux_reg |= (uint32_t)csiphy_params->csid_core;
	} else if (lane_mask == LANE_MASK_PHY_B) { /* PHY B */
		/* 2 lane config */
		num_lanes = 2;
		if (csiphy_dev->snps_state == NOT_CONFIGURED) {
		mode = TWO_LANE_PHY_B;
		if (csiphy_dev->snps_state == NOT_CONFIGURED) {
			csiphy_dev->snps_state = CONFIGURED_TWO_LANE_PHY_B;
		} else if (csiphy_dev->snps_state ==
			CONFIGURED_TWO_LANE_PHY_A) {
			/* 2 lane + 2 lane config */
			mode = TWO_LANE_PHY_B;
			csiphy_dev->snps_state = CONFIGURED_COMBO_MODE;
		} else {
			pr_err("%s: invalid request\n", __func__);
			return -EINVAL;
			if (csiphy_dev->snps_programmed_data_rate !=
				csiphy_params->data_rate)
				pr_err("reconfiguring snps phy");
			else
				return 0;
		}
		clk_mux_reg &= ~0xf0;
		clk_mux_reg |= csiphy_params->csid_core << 4;
@@ -1660,6 +1669,7 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev)
		csiphy_dev->hw_version);
	csiphy_dev->csiphy_state = CSIPHY_POWER_UP;
	csiphy_dev->snps_state = NOT_CONFIGURED;
	csiphy_dev->snps_programmed_data_rate = 0;
	return 0;

csiphy_enable_clk_fail:
@@ -1766,6 +1776,7 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev)
		csiphy_dev->hw_version);
	csiphy_dev->csiphy_state = CSIPHY_POWER_UP;
	csiphy_dev->snps_state = NOT_CONFIGURED;
	csiphy_dev->snps_programmed_data_rate = 0;
	return 0;

csiphy_enable_clk_fail:
@@ -1915,6 +1926,7 @@ static int msm_csiphy_release(struct csiphy_device *csiphy_dev, void *arg)

	csiphy_dev->csiphy_state = CSIPHY_POWER_DOWN;
	csiphy_dev->snps_state = NOT_CONFIGURED;
	csiphy_dev->snps_programmed_data_rate = 0;

	if (cam_config_ahb_clk(NULL, 0, CAM_AHB_CLIENT_CSIPHY,
		 CAM_AHB_SUSPEND_VOTE) < 0)
@@ -2047,6 +2059,7 @@ static int msm_csiphy_release(struct csiphy_device *csiphy_dev, void *arg)

	csiphy_dev->csiphy_state = CSIPHY_POWER_DOWN;
	csiphy_dev->snps_state = NOT_CONFIGURED;
	csiphy_dev->snps_programmed_data_rate = 0;

	if (cam_config_ahb_clk(NULL, 0, CAM_AHB_CLIENT_CSIPHY,
		 CAM_AHB_SUSPEND_VOTE) < 0)
+1 −0
Original line number Diff line number Diff line
@@ -250,6 +250,7 @@ struct csiphy_device {
	uint8_t is_snps_phy;
	enum snps_csiphy_state snps_state;
	uint8_t num_clk_irq_registers;
	uint64_t snps_programmed_data_rate;
};

#define VIDIOC_MSM_CSIPHY_RELEASE \