Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c70a9744 authored by harninder rai's avatar harninder rai Committed by Scott Wood
Browse files

powerpc/fsl: Add/update miscellaneous missing binding



Missing bindings were found on running checkpatch.pl on bsc9132
device tree. This patch add/update the following

- Add bindings for L2 cache controller
- Add bindings for memory controller
- Update bindings for USB controller

Signed-off-by: default avatarHarninder Rai <harninder.rai@freescale.com>
Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
parent 2eb1b9a4
Loading
Loading
Loading
Loading
+23 −0
Original line number Diff line number Diff line
Freescale L2 Cache Controller

L2 cache is present in Freescale's QorIQ and QorIQ Qonverge platforms.
The cache bindings explained below are ePAPR compliant

Required Properties:

- compatible	: Should include "fsl,chip-l2-cache-controller" and "cache"
		  where chip is the processor (bsc9132, npc8572 etc.)
- reg		: Address and size of L2 cache controller registers
- cache-size	: Size of the entire L2 cache
- interrupts	: Error interrupt of L2 controller
- cache-line-size : Size of L2 cache lines

Example:

	L2: l2-cache-controller@20000 {
		compatible = "fsl,bsc9132-l2-cache-controller", "cache";
		reg = <0x20000 0x1000>;
		cache-line-size = <32>; // 32 bytes
		cache-size = <0x40000>; // L2,256K
		interrupts = <16 2 1 0>;
	};
+27 −0
Original line number Diff line number Diff line
Freescale DDR memory controller

Properties:

- compatible	: Should include "fsl,chip-memory-controller" where
		  chip is the processor (bsc9132, mpc8572 etc.), or
		  "fsl,qoriq-memory-controller".
- reg		: Address and size of DDR controller registers
- interrupts	: Error interrupt of DDR controller

Example 1:

	memory-controller@2000 {
		compatible = "fsl,bsc9132-memory-controller";
		reg = <0x2000 0x1000>;
		interrupts = <16 2 1 8>;
	};


Example 2:

	ddr1: memory-controller@8000 {
		compatible = "fsl,qoriq-memory-controller-v4.7",
				"fsl,qoriq-memory-controller";
		reg = <0x8000 0x1000>;
		interrupts = <16 2 1 23>;
	};
+3 −1
Original line number Diff line number Diff line
@@ -8,7 +8,9 @@ and additions :
Required properties :
 - compatible : Should be "fsl-usb2-mph" for multi port host USB
   controllers, or "fsl-usb2-dr" for dual role USB controllers
   or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121
   or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121.
   Wherever applicable, the IP version of the USB controller should
   also be mentioned (for eg. fsl-usb2-dr-v2.2 for bsc9132).
 - phy_type : For multi port host USB controllers, should be one of
   "ulpi", or "serial". For dual role USB controllers, should be
   one of "ulpi", "utmi", "utmi_wide", or "serial".