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Commit c6cf162a authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "UPSTREAM: Merge commit '3f8372c1' into msm-4.9 (kernel comp dev)- 11/07"

parents a7376fcc 51aadb72

Documentation/devicetree/bindings/media/video/msm-cam-vfe.txt

+20 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ The VFE device is described in one level of the device node. 
======================================

First Level Node - CAM VFE device

======================================

Required properties:

- compatible

  Usage: required

  Value type: <string>
@@ -74,6 +75,22 @@ First Level Node - CAM VFE device 
  Value type: <string>

  Definition: Source clock name.



Optional properties:

- clock-names-option

  Usage: optional

  Value type: <string>

  Definition: Optional clock names.



- clocks-option

  Usage: required if clock-names-option defined

  Value type: <phandle>

  Definition: List of optinal clocks used for VFE HW.



- clock-rates-option

  Usage: required if clock-names-option defined

  Value type: <u32>

  Definition: List of clocks rates for optional clocks.



Example:

	qcom,vfe0@acaf000 {

		cell-index = <0>;
@@ -105,5 +122,8 @@ Example: 
			<&clock_camcc CAM_CC_IFE_0_AXI_CLK>,

		clock-rates = <0 0 80000000 0 320000000 0 384000000 0 0 0>;

		src-clock-name = "ife_clk_src";

		clock-names-option = "ife_dsp_clk";

		clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>;

		clock-rates-option = <600000000>;

		status = "ok";

	};

arch/arm64/boot/dts/qcom/sdm670-camera.dtsi

+45 −25
Original line number Diff line number Diff line
@@ -149,7 +149,7 @@ 
			"cci_clk",

			"cci_clk_src";

		src-clock-name = "cci_clk_src";

		clock-cntl-level = "turbo";

		clock-cntl-level = "lowsvs";

		clock-rates = <0 0 0 0 0 37500000>;

		pinctrl-names = "cam_default", "cam_suspend";

		pinctrl-0 = <&cci0_active &cci1_active>;
@@ -403,17 +403,17 @@ 
			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 0>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 153000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 76500>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 153000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 120000>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 600000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 600000>;

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>;

		vdd-corners = <RPMH_REGULATOR_LEVEL_OFF

			RPMH_REGULATOR_LEVEL_RETENTION

			RPMH_REGULATOR_LEVEL_MIN_SVS
@@ -604,8 +604,10 @@ 
			<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_IFE_0_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 500000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 384000000 0 0 0 404000000 0 0>,

			<0 0 0 0 0 0 538000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "turbo";

		src-clock-name = "ife_csid_clk_src";

		status = "ok";

	};
@@ -639,12 +641,15 @@ 
			<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_IFE_0_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 600000000 0 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 404000000 0 0>,

			<0 0 0 0 0 0 480000000 0 0>,

			<0 0 0 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_clk_src";

		clock-names-option =  "ife_dsp_clk";

		clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>;

		clock-rates-option = <404000000>;

		clock-rates-option = <600000000>;

		status = "ok";

	};
@@ -685,8 +690,10 @@ 
			<&clock_camcc CAM_CC_IFE_1_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_IFE_1_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 500000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 384000000 0 0 0 404000000 0 0>,

			<0 0 0 0 0 0 538000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "turbo";

		src-clock-name = "ife_csid_clk_src";

		status = "ok";

	};
@@ -720,12 +727,15 @@ 
			<&clock_camcc CAM_CC_IFE_1_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_IFE_1_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 600000000 0 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 404000000 0 0>,

			<0 0 0 0 0 0 480000000 0 0>,

			<0 0 0 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_clk_src";

		clock-names-option =  "ife_dsp_clk";

		clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>;

		clock-rates-option = <404000000>;

		clock-rates-option = <600000000>;

		status = "ok";

	};
@@ -763,8 +773,10 @@ 
			<&clock_camcc CAM_CC_IFE_LITE_CLK>,

			<&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 384000000 0 0 0 404000000 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 384000000 0 0 0 404000000 0>,

			<0 0 0 0 0 0 538000000 0 0 0 600000000 0>;

		clock-cntl-level = "svs", "turbo";

		src-clock-name = "ife_csid_clk_src";

		status = "ok";

	};
@@ -795,8 +807,11 @@ 
			<&clock_camcc CAM_CC_IFE_LITE_CLK>,

			<&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 404000000 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 404000000 0>,

			<0 0 0 0 0 0 480000000 0>,

			<0 0 0 0 0 0 600000000 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_clk_src";

		status = "ok";

	};
@@ -844,8 +859,10 @@ 
				<&clock_camcc CAM_CC_ICP_CLK>,

				<&clock_camcc CAM_CC_ICP_CLK_SRC>;



		clock-rates = <0 0 400000000 0 0 0 0 0 600000000>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 200000000 0 0 0 0 400000000>,

			<0 0 200000000 0 0 0 0 600000000>;

		clock-cntl-level = "svs", "turbo";

		fw_name = "CAMERA_ICP.elf";

		ubwc-cfg = <0x77 0x1DF>;

		status = "ok";
@@ -1038,8 +1055,11 @@ 
			<&clock_camcc CAM_CC_FD_CORE_CLK>,

			<&clock_camcc CAM_CC_FD_CORE_UAR_CLK>;

		src-clock-name = "fd_core_clk_src";

		clock-cntl-level = "svs";

		clock-rates = <0 0 0 0 0 400000000 0 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		clock-rates =

			<0 0 0 0 0 400000000 0 0>,

			<0 0 0 0 0 538000000 0 0>,

			<0 0 0 0 0 600000000 0 0>;

		status = "ok";

	};

};

arch/arm64/boot/dts/qcom/sdm845-camera.dtsi

+56 −32
Original line number Diff line number Diff line
@@ -45,9 +45,10 @@ 
			"csiphy0_clk",

			"csi0phytimer_clk_src",

			"csi0phytimer_clk";

		clock-cntl-level = "turbo";

		clock-cntl-level = "svs", "turbo";

		clock-rates =

			<0 0 0 0 320000000 0 269333333 0>;

			<0 0 0 0 320000000 0 269333333 0>,

			<0 0 0 0 384000000 0 269333333 0>;

		status = "ok";

	};
@@ -79,9 +80,10 @@ 
			"csiphy1_clk",

			"csi1phytimer_clk_src",

			"csi1phytimer_clk";

		clock-cntl-level = "turbo";

		clock-cntl-level = "svs", "turbo";

		clock-rates =

			<0 0 0 0 320000000 0 269333333 0>;

			<0 0 0 0 320000000 0 269333333 0>,

			<0 0 0 0 384000000 0 269333333 0>;



		status = "ok";

	};
@@ -114,9 +116,10 @@ 
			"csiphy2_clk",

			"csi2phytimer_clk_src",

			"csi2phytimer_clk";

		clock-cntl-level = "turbo";

		clock-cntl-level = "svs", "turbo";

		clock-rates =

			<0 0 0 0 320000000 0 269333333 0>;

			<0 0 0 0 320000000 0 269333333 0>,

			<0 0 0 0 384000000 0 269333333 0>;

		status = "ok";

	};
@@ -146,7 +149,7 @@ 
			"cci_clk",

			"cci_clk_src";

		src-clock-name = "cci_clk_src";

		clock-cntl-level = "turbo";

		clock-cntl-level = "lowsvs";

		clock-rates = <0 0 0 0 0 37500000>;

		pinctrl-names = "cam_default", "cam_suspend";

		pinctrl-0 = <&cci0_active &cci1_active>;
@@ -399,17 +402,17 @@ 
			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 0>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 180000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 76500>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 180000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 76500>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 640000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 640000>;

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>;

		vdd-corners = <RPMH_REGULATOR_LEVEL_OFF

			RPMH_REGULATOR_LEVEL_RETENTION

			RPMH_REGULATOR_LEVEL_MIN_SVS
@@ -600,8 +603,10 @@ 
			<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_IFE_0_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 500000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 384000000 0 0 0 404000000 0 0>,

			<0 0 0 0 0 0 538000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "turbo";

		src-clock-name = "ife_csid_clk_src";

		status = "ok";

	};
@@ -635,12 +640,15 @@ 
			<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_IFE_0_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 600000000 0 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 404000000 0 0>,

			<0 0 0 0 0 0 480000000 0 0>,

			<0 0 0 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_clk_src";

		clock-names-option =  "ife_dsp_clk";

		clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>;

		clock-rates-option = <404000000>;

		clock-rates-option = <600000000>;

		status = "ok";

	};
@@ -681,8 +689,10 @@ 
			<&clock_camcc CAM_CC_IFE_1_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_IFE_1_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 500000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 384000000 0 0 0 404000000 0 0>,

			<0 0 0 0 0 0 538000000 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "turbo";

		src-clock-name = "ife_csid_clk_src";

		status = "ok";

	};
@@ -716,12 +726,15 @@ 
			<&clock_camcc CAM_CC_IFE_1_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_IFE_1_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 600000000 0 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 404000000 0 0>,

			<0 0 0 0 0 0 480000000 0 0>,

			<0 0 0 0 0 0 600000000 0 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_clk_src";

		clock-names-option =  "ife_dsp_clk";

		clocks-option = <&clock_camcc CAM_CC_IFE_1_DSP_CLK>;

		clock-rates-option = <404000000>;

		clock-rates-option = <600000000>;

		status = "ok";

	};
@@ -759,8 +772,10 @@ 
			<&clock_camcc CAM_CC_IFE_LITE_CLK>,

			<&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 384000000 0 0 0 404000000 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 384000000 0 0 0 404000000 0>,

			<0 0 0 0 0 0 538000000 0 0 0 600000000 0>;

		clock-cntl-level = "svs";

		src-clock-name = "ife_csid_clk_src";

		status = "ok";

	};
@@ -791,8 +806,11 @@ 
			<&clock_camcc CAM_CC_IFE_LITE_CLK>,

			<&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>;

		clock-rates = <0 0 0 0 0 0 404000000 0>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 0 0 0 0 404000000 0>,

			<0 0 0 0 0 0 480000000 0>,

			<0 0 0 0 0 0 600000000 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		src-clock-name = "ife_clk_src";

		status = "ok";

	};
@@ -838,8 +856,10 @@ 
				<&clock_camcc CAM_CC_ICP_CLK>,

				<&clock_camcc CAM_CC_ICP_CLK_SRC>;



		clock-rates = <0 0 400000000 0 0 0 0 600000000>;

		clock-cntl-level = "turbo";

		clock-rates =

			<0 0 200000000 0 0 0 0 400000000>,

			<0 0 200000000 0 0 0 0 600000000>;

		clock-cntl-level = "svs", "turbo";

		fw_name = "CAMERA_ICP.elf";

		ubwc-cfg = <0x7F 0x1FF>;

		status = "ok";
@@ -862,7 +882,8 @@ 
				<&clock_camcc CAM_CC_IPE_0_CLK>,

				<&clock_camcc CAM_CC_IPE_0_CLK_SRC>;



		clock-rates = <0 0 0 0 240000000>,

		clock-rates =

			<0 0 0 0 240000000>,

			<0 0 0 0 404000000>,

			<0 0 0 0 480000000>,

			<0 0 0 0 538000000>,
@@ -1032,8 +1053,11 @@ 
			<&clock_camcc CAM_CC_FD_CORE_CLK>,

			<&clock_camcc CAM_CC_FD_CORE_UAR_CLK>;

		src-clock-name = "fd_core_clk_src";

		clock-cntl-level = "svs";

		clock-rates = <0 0 0 0 0 400000000 0 0>;

		clock-cntl-level = "svs", "svs_l1", "turbo";

		clock-rates =

			<0 0 0 0 0 400000000 0 0>,

			<0 0 0 0 0 538000000 0 0>,

			<0 0 0 0 0 600000000 0 0>;

		status = "ok";

	};

};

arch/arm64/boot/dts/qcom/sdm845-v2-camera.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -297,17 +297,17 @@ 
			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 0>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 153000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 76500>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 153000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 76500>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 600000>,

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,

			<MSM_BUS_MASTER_AMPSS_M0

			MSM_BUS_SLAVE_CAMERA_CFG 0 600000>;

			MSM_BUS_SLAVE_CAMERA_CFG 0 300000>;

		vdd-corners = <RPMH_REGULATOR_LEVEL_OFF

			RPMH_REGULATOR_LEVEL_RETENTION

			RPMH_REGULATOR_LEVEL_MIN_SVS

drivers/media/platform/msm/camera/cam_core/cam_context.c

+4 −2
Original line number Diff line number Diff line
@@ -332,14 +332,15 @@ int cam_context_handle_stop_dev(struct cam_context *ctx, 
			ctx, cmd);

	else

		/* stop device can be optional for some driver */

		CAM_WARN(CAM_CORE, "No stop device in dev %d, state %d",

			ctx->dev_hdl, ctx->state);

		CAM_WARN(CAM_CORE, "No stop device in dev %d, name %s state %d",

			ctx->dev_hdl, ctx->dev_name, ctx->state);

	mutex_unlock(&ctx->ctx_mutex);



	return rc;

}



int cam_context_init(struct cam_context *ctx,

	const char *dev_name,

	struct cam_req_mgr_kmd_ops *crm_node_intf,

	struct cam_hw_mgr_intf *hw_mgr_intf,

	struct cam_ctx_request *req_list,
@@ -361,6 +362,7 @@ int cam_context_init(struct cam_context *ctx, 
	mutex_init(&ctx->ctx_mutex);

	spin_lock_init(&ctx->lock);



	ctx->dev_name = dev_name;

	ctx->ctx_crm_intf = NULL;

	ctx->crm_ctx_intf = crm_node_intf;

	ctx->hw_mgr_intf = hw_mgr_intf;