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Commit c6007ffe authored by Philip Avinash's avatar Philip Avinash Committed by Sekhar Nori
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ARM: davinci: clk framework support for enable/disable functionality



DaVinci clock implementation does not support clock enable/disable
functionality on non-PSC clock nodes.

On DA850 SoC, EHRPWM module requires support for enable/disable
of TBCLK controlled using a system module register.

This patch adds a method for enabling/disabling non-PSC clocks
into DaVinci clock implementation.

Signed-off-by: default avatarPhilip Avinash <avinashphilip@ti.com>
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
parent 07961ac7
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+14 −7
Original line number Diff line number Diff line
@@ -35,19 +35,26 @@ static void __clk_enable(struct clk *clk)
{
	if (clk->parent)
		__clk_enable(clk->parent);
	if (clk->usecount++ == 0 && (clk->flags & CLK_PSC))
	if (clk->usecount++ == 0) {
		if (clk->flags & CLK_PSC)
			davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
					   true, clk->flags);
		else if (clk->clk_enable)
			clk->clk_enable(clk);
	}
}

static void __clk_disable(struct clk *clk)
{
	if (WARN_ON(clk->usecount == 0))
		return;
	if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) &&
	    (clk->flags & CLK_PSC))
	if (--clk->usecount == 0) {
		if (!(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC))
			davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
					   false, clk->flags);
		else if (clk->clk_disable)
			clk->clk_disable(clk);
	}
	if (clk->parent)
		__clk_disable(clk->parent);
}
+2 −0
Original line number Diff line number Diff line
@@ -104,6 +104,8 @@ struct clk {
	int (*set_rate) (struct clk *clk, unsigned long rate);
	int (*round_rate) (struct clk *clk, unsigned long rate);
	int (*reset) (struct clk *clk, bool reset);
	void (*clk_enable) (struct clk *clk);
	void (*clk_disable) (struct clk *clk);
};

/* Clock flags: SoC-specific flags start at BIT(16) */