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Commit c5a890a4 authored Feb 02, 2016 by Bai Ping Committed by Shawn Guo Feb 14, 2016

ARM: imx: Add msl code support for imx6qp



The i.MX6QP is a different SOC, but internally we treate it as i.MX6Q
Rev_2.0 to maximum the code reusability. The chip silicon number we
read from the ANADIG_DIGPROG is 0x630100. This patch add code to
identify it as i.MX6QP Rev_1.0 when print out the silicon version.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

parent 26e30c64

arch/arm/mach-imx/anatop.c

+8 −1

Original line number	Original line	Diff line number	Diff line
	@@ -129,6 +129,13 @@ void __init imx_init_revision_from_anatop(void)

	switch (digprog & 0xff) {		switch (digprog & 0xff) {
	case 0:		case 0:
			/*
			* For i.MX6QP, most of the code for i.MX6Q can be resued,
			* so internally, we identify it as i.MX6Q Rev 2.0
			*/
			if (digprog >> 8 & 0x01)
			revision = IMX_CHIP_REVISION_2_0;
			else
	revision = IMX_CHIP_REVISION_1_0;		revision = IMX_CHIP_REVISION_1_0;
	break;		break;
	case 1:		case 1:

arch/arm/mach-imx/mach-imx6q.c

+6 −2

Original line number	Original line	Diff line number	Diff line
	@@ -266,6 +266,9 @@ static void __init imx6q_init_machine(void)
	{		{
	struct device *parent;		struct device *parent;

			if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0)
			imx_print_silicon_rev("i.MX6QP", IMX_CHIP_REVISION_1_0);
			else
	imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",		imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",
	imx_get_soc_revision());		imx_get_soc_revision());

	@@ -399,6 +402,7 @@ static void __init imx6q_init_irq(void)
	static const char * const imx6q_dt_compat[] __initconst = {		static const char * const imx6q_dt_compat[] __initconst = {
	"fsl,imx6dl",		"fsl,imx6dl",
	"fsl,imx6q",		"fsl,imx6q",
			"fsl,imx6qp",
	NULL,		NULL,
	};		};