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Commit c5a2e5d2 authored by Dhaval Patel's avatar Dhaval Patel
Browse files

drm/msm: dump rsc debug bus information 



Dump rsc debug bus status information to check
if MDP frame transfer is blocked due to rsc or
not.

Change-Id: I9f1dc097d38730021b248508d88d0c42a029c8bf
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent c1e4bfc7

drivers/gpu/drm/msm/sde_dbg.c

+39 −10
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ 


/* offsets from sde top address for the debug buses */

#define DBGBUS_SSPP0	0x188

#define DBGBUS_AXI_INTF	0x194

#define DBGBUS_SSPP1	0x298

#define DBGBUS_DSPP	0x348

#define DBGBUS_PERIPH	0x418
@@ -66,6 +67,7 @@ 
/* print debug ranges in groups of 4 u32s */

#define REG_DUMP_ALIGN		16



#define RSC_DEBUG_MUX_SEL_SDM845 9

/**

 * struct sde_dbg_reg_offset - tracking for start and end of region

 * @start: start offset
@@ -128,7 +130,8 @@ struct sde_debug_bus_entry { 
	u32 wr_addr;

	u32 block_id;

	u32 test_id;

	void (*analyzer)(struct sde_debug_bus_entry *entry, u32 val);

	void (*analyzer)(void __iomem *mem_base,

				struct sde_debug_bus_entry *entry, u32 val);

};



struct vbif_debug_bus_entry {
@@ -196,15 +199,15 @@ static struct sde_dbg_base { 
/* sde_dbg_base_evtlog - global pointer to main sde event log for macro use */

struct sde_dbg_evtlog *sde_dbg_base_evtlog;



static void _sde_debug_bus_xbar_dump(struct sde_debug_bus_entry *entry,

		u32 val)

static void _sde_debug_bus_xbar_dump(void __iomem *mem_base,

		struct sde_debug_bus_entry *entry, u32 val)

{

	dev_err(sde_dbg_base.dev, "xbar 0x%x %d %d 0x%x\n",

			entry->wr_addr, entry->block_id, entry->test_id, val);

}



static void _sde_debug_bus_lm_dump(struct sde_debug_bus_entry *entry,

		u32 val)

static void _sde_debug_bus_lm_dump(void __iomem *mem_base,

		struct sde_debug_bus_entry *entry, u32 val)

{

	if (!(val & 0xFFF000))

		return;
@@ -213,8 +216,8 @@ static void _sde_debug_bus_lm_dump(struct sde_debug_bus_entry *entry, 
			entry->wr_addr, entry->block_id, entry->test_id, val);

}



static void _sde_debug_bus_ppb0_dump(struct sde_debug_bus_entry *entry,

		u32 val)

static void _sde_debug_bus_ppb0_dump(void __iomem *mem_base,

		struct sde_debug_bus_entry *entry, u32 val)

{

	if (!(val & BIT(15)))

		return;
@@ -223,8 +226,8 @@ static void _sde_debug_bus_ppb0_dump(struct sde_debug_bus_entry *entry, 
			entry->wr_addr, entry->block_id, entry->test_id, val);

}



static void _sde_debug_bus_ppb1_dump(struct sde_debug_bus_entry *entry,

		u32 val)

static void _sde_debug_bus_ppb1_dump(void __iomem *mem_base,

		struct sde_debug_bus_entry *entry, u32 val)

{

	if (!(val & BIT(15)))

		return;
@@ -233,6 +236,29 @@ static void _sde_debug_bus_ppb1_dump(struct sde_debug_bus_entry *entry, 
			entry->wr_addr, entry->block_id, entry->test_id, val);

}



static void _sde_debug_bus_axi_dump_sdm845(void __iomem *mem_base,

		struct sde_debug_bus_entry *entry, u32 val)

{

	u32 status, i;



	if (!mem_base || !entry)

		return;



	for (i = 0; i <= RSC_DEBUG_MUX_SEL_SDM845; i++) {

		sde_rsc_debug_dump(i);



		/* make sure that mux_sel updated */

		wmb();



		/* read status again after rsc routes the debug bus */

		status = readl_relaxed(mem_base + DBGBUS_DSPP_STATUS);



		dev_err(sde_dbg_base.dev, "rsc mux_sel:%d 0x%x %d %d 0x%x\n",

			i, entry->wr_addr, entry->block_id,

			entry->test_id, status);

	}

}



static struct sde_debug_bus_entry dbg_bus_sde_8998[] = {



	/* Unpack 0 sspp 0*/
@@ -1986,6 +2012,9 @@ static struct sde_debug_bus_entry dbg_bus_sde_sdm845[] = { 
	{ DBGBUS_PERIPH, 71, 3},

	{ DBGBUS_PERIPH, 71, 4},

	{ DBGBUS_PERIPH, 71, 5},



	/* axi - should be last entry */

	{ DBGBUS_AXI_INTF, 62, 0, _sde_debug_bus_axi_dump_sdm845},

};



static struct vbif_debug_bus_entry vbif_dbg_bus_msm8998[] = {
@@ -2332,7 +2361,7 @@ static void _sde_dbg_dump_sde_dbg_bus(struct sde_dbg_sde_debug_bus *bus) 
		}



		if (head->analyzer)

			head->analyzer(head, status);

			head->analyzer(mem_base, head, status);



		/* Disable debug bus once we are done */

		writel_relaxed(0, mem_base + head->wr_addr);

drivers/gpu/drm/msm/sde_dbg.h

+9 −0
Original line number Diff line number Diff line
@@ -315,6 +315,12 @@ void sde_evtlog_set_filter(struct sde_dbg_evtlog *evtlog, char *filter); 
int sde_evtlog_get_filter(struct sde_dbg_evtlog *evtlog, int index,

		char *buf, size_t bufsz);



/**

 * sde_rsc_debug_dump - sde rsc debug dump status

 * @mux_sel:	select mux on rsc debug bus

 */

void sde_rsc_debug_dump(u32 mux_sel);



#else

static inline struct sde_dbg_evtlog *sde_evtlog_init(void)

{
@@ -396,6 +402,9 @@ static inline int sde_evtlog_get_filter(struct sde_dbg_evtlog *evtlog, 
	return -EINVAL;

}



static inline void sde_rsc_debug_dump(u32 mux_sel)

{

}

#endif /* defined(CONFIG_DEBUG_FS) */

drivers/gpu/drm/msm/sde_rsc.c

+15 −0
Original line number Diff line number Diff line
@@ -837,6 +837,21 @@ int sde_rsc_client_vote(struct sde_rsc_client *caller_client, 
}

EXPORT_SYMBOL(sde_rsc_client_vote);



#if defined(CONFIG_DEBUG_FS)

void sde_rsc_debug_dump(u32 mux_sel)

{

	struct sde_rsc_priv *rsc;



	rsc = rsc_prv_list[SDE_RSC_INDEX];

	if (!rsc)

		return;



	/* this must be called with rsc clocks enabled */

	if (rsc->hw_ops.debug_dump)

		rsc->hw_ops.debug_dump(rsc, mux_sel);

}

#endif /* defined(CONFIG_DEBUG_FS) */



static int _sde_debugfs_status_show(struct seq_file *s, void *data)

{

	struct sde_rsc_priv *rsc;

drivers/gpu/drm/msm/sde_rsc_hw.c

+7 −0
Original line number Diff line number Diff line
@@ -746,6 +746,12 @@ int rsc_hw_vsync(struct sde_rsc_priv *rsc, enum rsc_vsync_req request, 
	return blen;

}



static void rsc_hw_debug_dump(struct sde_rsc_priv *rsc, u32 mux_sel)

{

	dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_DEBUG_BUS,

		((mux_sel & 0xf) << 1) | BIT(0), rsc->debug_mode);

}



bool rsc_hw_is_amc_mode(struct sde_rsc_priv *rsc)

{

	return dss_reg_r(&rsc->drv_io, SDE_RSCC_TCS_DRV0_CONTROL,
@@ -806,6 +812,7 @@ int sde_rsc_hw_register(struct sde_rsc_priv *rsc) 
	rsc->hw_ops.state_update = sde_rsc_state_update;

	rsc->hw_ops.debug_show = sde_rsc_debug_show;

	rsc->hw_ops.mode_ctrl = rsc_hw_mode_ctrl;

	rsc->hw_ops.debug_dump = rsc_hw_debug_dump;



	return 0;

}

drivers/gpu/drm/msm/sde_rsc_priv.h

+2 −0
Original line number Diff line number Diff line
@@ -73,6 +73,7 @@ enum rsc_vsync_req { 
 * @hw_vsync:			Enables the vsync on RSC block.

 * @tcs_use_ok:			set TCS set to high to allow RSC to use it.

 * @is_amc_mode:		Check current amc mode status

 * @debug_dump:			dump debug bus registers or enable debug bus

 * @state_update:		Enable/override the solver based on rsc state

 *                              status (command/video)

 * @mode_show:			shows current mode status, mode0/1/2
@@ -87,6 +88,7 @@ struct sde_rsc_hw_ops { 
		char *buffer, int buffer_size, u32 mode);

	int (*tcs_use_ok)(struct sde_rsc_priv *rsc);

	bool (*is_amc_mode)(struct sde_rsc_priv *rsc);

	void (*debug_dump)(struct sde_rsc_priv *rsc, u32 mux_sel);

	int (*state_update)(struct sde_rsc_priv *rsc, enum sde_rsc_state state);

	int (*debug_show)(struct seq_file *s, struct sde_rsc_priv *rsc);

	int (*mode_ctrl)(struct sde_rsc_priv *rsc, enum rsc_mode_req request,