Merge remote-tracking branches 'spi/topic/ti-qspi', 'spi/topic/xcomm' and...

SPI Master controller for Netlogic XLP MIPS64 SOCs

==================================================

Currently this SPI controller driver is supported for the following

Netlogic XLP SoCs:

	XLP832, XLP316, XLP208, XLP980, XLP532

Required properties:

- compatible		: Should be "netlogic,xlp832-spi".

- #address-cells	: Number of cells required to define a chip select address

			  on the SPI bus.

- #size-cells		: Should be zero.

- reg			: Should contain register location and length.

- clocks		: Phandle of the spi clock

- interrupts		: Interrupt number used by this controller.

- interrupt-parent	: Phandle of the parent interrupt controller.

SPI slave nodes must be children of the SPI master node and can contain

properties described in Documentation/devicetree/bindings/spi/spi-bus.txt.

Example:

	spi: xlp_spi@3a100 {

		compatible = "netlogic,xlp832-spi";

		#address-cells = <1>;

		#size-cells = <0>;

		reg = <0 0x3a100 0x100>;

		clocks = <&spi_clk>;

		interrupts = <34>;

		interrupt-parent = <&pic>;

		spi_nor@1 {

			compatible = "spansion,s25sl12801";

			#address-cells = <1>;

			#size-cells = <1>;

			reg = <1>;	/* Chip Select */

			spi-max-frequency = <40000000>;

		};

};

	  Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)"

config SPI_XLP

	tristate "Netlogic XLP SPI controller driver"

	depends on CPU_XLP || COMPILE_TEST

	help

	  Enable support for the SPI controller on the Netlogic XLP SoCs.

	  Currently supported XLP variants are XLP8XX, XLP3XX, XLP2XX, XLP9XX

	  and XLP5XX.

	  If you have a Netlogic XLP platform say Y here.

	  If unsure, say N.

config SPI_XTENSA_XTFPGA

	tristate "Xtensa SPI controller for xtfpga"

	depends on (XTENSA && XTENSA_PLATFORM_XTFPGA) || COMPILE_TEST

obj-$(CONFIG_SPI_TXX9)			+= spi-txx9.o

obj-$(CONFIG_SPI_XCOMM)		+= spi-xcomm.o

obj-$(CONFIG_SPI_XILINX)		+= spi-xilinx.o

obj-$(CONFIG_SPI_XLP)			+= spi-xlp.o

obj-$(CONFIG_SPI_XTENSA_XTFPGA)		+= spi-xtensa-xtfpga.o

obj-$(CONFIG_SPI_ZYNQMP_GQSPI)		+= spi-zynqmp-gqspi.o

#define QSPI_INVAL			(4 << 16)

#define QSPI_WC_CMD_INT_EN			(1 << 14)

#define QSPI_FLEN(n)			((n - 1) << 0)

#define QSPI_WLEN_MAX_BITS		128

#define QSPI_WLEN_MAX_BYTES		16

/* STATUS REGISTER */

#define BUSY				0x01

static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)

{

	int wlen, count;

	int wlen, count, xfer_len;

	unsigned int cmd;

	const u8 *txbuf;

	u32 data;

	txbuf = t->tx_buf;

	cmd = qspi->cmd | QSPI_WR_SNGL;

	count = t->len;

	wlen = t->bits_per_word >> 3;	/* in bytes */

	xfer_len = wlen;

	while (count) {

		if (qspi_is_busy(qspi))

		case 1:

			dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %02x\n",

					cmd, qspi->dc, *txbuf);

			if (count >= QSPI_WLEN_MAX_BYTES) {

				u32 *txp = (u32 *)txbuf;

				data = cpu_to_be32(*txp++);

				writel(data, qspi->base +

				       QSPI_SPI_DATA_REG_3);

				data = cpu_to_be32(*txp++);

				writel(data, qspi->base +

				       QSPI_SPI_DATA_REG_2);

				data = cpu_to_be32(*txp++);

				writel(data, qspi->base +

				       QSPI_SPI_DATA_REG_1);

				data = cpu_to_be32(*txp++);

				writel(data, qspi->base +

				       QSPI_SPI_DATA_REG);

				xfer_len = QSPI_WLEN_MAX_BYTES;

				cmd |= QSPI_WLEN(QSPI_WLEN_MAX_BITS);

			} else {

				writeb(*txbuf, qspi->base + QSPI_SPI_DATA_REG);

				cmd = qspi->cmd | QSPI_WR_SNGL;

				xfer_len = wlen;

				cmd |= QSPI_WLEN(wlen);

			}

			break;

		case 2:

			dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %04x\n",

			dev_err(qspi->dev, "write timed out\n");

			return -ETIMEDOUT;

		}

		txbuf += wlen;

		count -= wlen;

		txbuf += xfer_len;

		count -= xfer_len;

	}

	return 0;

	{ "spi-xcomm" },

	{ },

};

MODULE_DEVICE_TABLE(i2c, spi_xcomm_ids);

static struct i2c_driver spi_xcomm_driver = {

	.driver = {

		.name	= "spi-xcomm",

		.owner	= THIS_MODULE,

	},

	.id_table	= spi_xcomm_ids,

	.probe		= spi_xcomm_probe,