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Commit c55afbaa authored by George Shen's avatar George Shen Committed by Vicky Wallace
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ARM: dts: msm: Remove GPU_CC_AHB_CLK from GPU on SDM845



GPU AHB clock is automatically controlled by CX head switch in HW.
Remove it from GPU driver controlled clock list.

Change-Id: I1c0c5ecafb0339a6b6d6d4071f7e3fc28f2db824
Signed-off-by: default avatarGeorge Shen <sqiao@codeaurora.org>
parent 1ded649b
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+4 −6
Original line number Diff line number Diff line
@@ -82,11 +82,10 @@
			<&clock_gpucc GPU_CC_CXO_CLK>,
			<&clock_gcc GCC_DDRSS_GPU_AXI_CLK>,
			<&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>,
			<&clock_gpucc GPU_CC_CX_GMU_CLK>,
			<&clock_gpucc GPU_CC_AHB_CLK>;
			<&clock_gpucc GPU_CC_CX_GMU_CLK>;

		clock-names = "core_clk", "rbbmtimer_clk", "mem_clk",
				"mem_iface_clk", "gmu_clk", "ahb_clk";
				"mem_iface_clk", "gmu_clk";

		qcom,isense-clk-on-level = <1>;

@@ -319,11 +318,10 @@
		clocks = <&clock_gpucc GPU_CC_CX_GMU_CLK>,
				<&clock_gpucc GPU_CC_CXO_CLK>,
				<&clock_gcc GCC_DDRSS_GPU_AXI_CLK>,
				<&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>,
				<&clock_gpucc GPU_CC_AHB_CLK>;
				<&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>;

		clock-names = "gmu_clk", "cxo_clk", "axi_clk",
				"memnoc_clk", "ahb_clk";
				"memnoc_clk";

		qcom,gmu-pwrlevels {
			#address-cells = <1>;