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Commit c520c921 authored by Uwe Kleine-König's avatar Uwe Kleine-König Committed by Sascha Hauer
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ARM: imx: assert SCC gate stays enabled 



The SCC clock is needed in internal boot mode and so must keep enabled.
This same issue was fixed for the pre-common-clk code in commit

	3d6e6149 (mx35: Fix boot ROM hang in internal boot mode)

Cc: John Ogness <jogness@linutronix.de>
Cc: Hans J. Koch <hjk@hansjkoch.de>
Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent 396c89b3

arch/arm/mach-imx/clk-imx35.c

+8 −1
Original line number Diff line number Diff line
@@ -201,7 +201,6 @@ int __init mx35_clocks_init() 
			pr_err("i.MX35 clk %d: register failed with %ld\n",

				i, PTR_ERR(clk[i]));





	clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");

	clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");

	clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");
@@ -264,6 +263,14 @@ int __init mx35_clocks_init() 
	clk_prepare_enable(clk[iim_gate]);

	clk_prepare_enable(clk[emi_gate]);



	/*

	 * SCC is needed to boot via mmc after a watchdog reset. The clock code

	 * before conversion to common clk also enabled UART1 (which isn't

	 * handled here and not needed for mmc) and IIM (which is enabled

	 * unconditionally above).

	 */

	clk_prepare_enable(clk[scc_gate]);



	imx_print_silicon_rev("i.MX35", mx35_revision());



#ifdef CONFIG_MXC_USE_EPIT