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Commit c462abbf authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge 4.9.99 into android-4.9 



Changes in 4.9.99
	perf/core: Fix the perf_cpu_time_max_percent check
	percpu: include linux/sched.h for cond_resched()
	bpf: map_get_next_key to return first key on NULL
	arm/arm64: KVM: Add PSCI version selection API
	crypto: talitos - fix IPsec cipher in length
	serial: imx: ensure UCR3 and UFCR are setup correctly
	USB: serial: option: Add support for Quectel EP06
	ALSA: pcm: Check PCM state at xfern compat ioctl
	ALSA: seq: Fix races at MIDI encoding in snd_virmidi_output_trigger()
	ALSA: aloop: Mark paused device as inactive
	ALSA: aloop: Add missing cable lock to ctl API callbacks
	tracepoint: Do not warn on ENOMEM
	Input: leds - fix out of bound access
	Input: atmel_mxt_ts - add touchpad button mapping for Samsung Chromebook Pro
	xfs: prevent creating negative-sized file via INSERT_RANGE
	RDMA/cxgb4: release hw resources on device removal
	RDMA/ucma: Allow resolving address w/o specifying source address
	RDMA/mlx5: Protect from shift operand overflow
	NET: usb: qmi_wwan: add support for ublox R410M PID 0x90b2
	IB/mlx5: Use unlimited rate when static rate is not supported
	IB/hfi1: Fix NULL pointer dereference when invalid num_vls is used
	drm/vmwgfx: Fix a buffer object leak
	drm/bridge: vga-dac: Fix edid memory leak
	test_firmware: fix setting old custom fw path back on exit, second try
	USB: serial: visor: handle potential invalid device configuration
	USB: Accept bulk endpoints with 1024-byte maxpacket
	USB: serial: option: reimplement interface masking
	USB: serial: option: adding support for ublox R410M
	usb: musb: host: fix potential NULL pointer dereference
	usb: musb: trace: fix NULL pointer dereference in musb_g_tx()
	platform/x86: asus-wireless: Fix NULL pointer dereference
	s390/facilites: use stfle_fac_list array size for MAX_FACILITY_BIT
	Linux 4.9.99

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
parents 9731a2da 04cd74a7

Documentation/virtual/kvm/api.txt

+8 −1
Original line number Diff line number Diff line
@@ -2118,6 +2118,9 @@ ARM 32-bit VFP control registers have the following id bit patterns: 
ARM 64-bit FP registers have the following id bit patterns:

  0x4030 0000 0012 0 <regno:12>



ARM firmware pseudo-registers have the following bit pattern:

  0x4030 0000 0014 <regno:16>





arm64 registers are mapped using the lower 32 bits. The upper 16 of

that is the register group type, or coprocessor number:
@@ -2134,6 +2137,9 @@ arm64 CCSIDR registers are demultiplexed by CSSELR value: 
arm64 system registers have the following id bit patterns:

  0x6030 0000 0013 <op0:2> <op1:3> <crn:4> <crm:4> <op2:3>



arm64 firmware pseudo-registers have the following bit pattern:

  0x6030 0000 0014 <regno:16>





MIPS registers are mapped using the lower 32 bits.  The upper 16 of that is

the register group type:
@@ -2656,7 +2662,8 @@ Possible features: 
	  and execute guest code when KVM_RUN is called.

	- KVM_ARM_VCPU_EL1_32BIT: Starts the CPU in a 32bit mode.

	  Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only).

	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 for the CPU.

	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 (or a future revision

          backward compatible with v0.2) for the CPU.

	  Depends on KVM_CAP_ARM_PSCI_0_2.

	- KVM_ARM_VCPU_PMU_V3: Emulate PMUv3 for the CPU.

	  Depends on KVM_CAP_ARM_PMU_V3.

Documentation/virtual/kvm/arm/psci.txt

0 → 100644
+30 −0
Original line number Diff line number Diff line 
KVM implements the PSCI (Power State Coordination Interface)

specification in order to provide services such as CPU on/off, reset

and power-off to the guest.



The PSCI specification is regularly updated to provide new features,

and KVM implements these updates if they make sense from a virtualization

point of view.



This means that a guest booted on two different versions of KVM can

observe two different "firmware" revisions. This could cause issues if

a given guest is tied to a particular PSCI revision (unlikely), or if

a migration causes a different PSCI version to be exposed out of the

blue to an unsuspecting guest.



In order to remedy this situation, KVM exposes a set of "firmware

pseudo-registers" that can be manipulated using the GET/SET_ONE_REG

interface. These registers can be saved/restored by userspace, and set

to a convenient value if required.



The following register is defined:



* KVM_REG_ARM_PSCI_VERSION:



  - Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set

    (and thus has already been initialized)

  - Returns the current PSCI version on GET_ONE_REG (defaulting to the

    highest PSCI version implemented by KVM and compatible with v0.2)

  - Allows any PSCI version implemented by KVM and compatible with

    v0.2 to be set with SET_ONE_REG

  - Affects the whole VM (even if the register view is per-vcpu)

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 4

PATCHLEVEL = 9

SUBLEVEL = 98

SUBLEVEL = 99

EXTRAVERSION =

NAME = Roaring Lionus

arch/arm/include/asm/kvm_host.h

+3 −0
Original line number Diff line number Diff line
@@ -78,6 +78,9 @@ struct kvm_arch { 
	/* Interrupt controller */

	struct vgic_dist	vgic;

	int max_vcpus;



	/* Mandated version of PSCI */

	u32 psci_version;

};



#define KVM_NR_MEM_OBJS     40

arch/arm/include/uapi/asm/kvm.h

+6 −0
Original line number Diff line number Diff line
@@ -173,6 +173,12 @@ struct kvm_arch_memory_slot { 
#define KVM_REG_ARM_VFP_FPINST		0x1009

#define KVM_REG_ARM_VFP_FPINST2		0x100A



/* KVM-as-firmware specific pseudo-registers */

#define KVM_REG_ARM_FW			(0x0014 << KVM_REG_ARM_COPROC_SHIFT)

#define KVM_REG_ARM_FW_REG(r)		(KVM_REG_ARM | KVM_REG_SIZE_U64 | \

					 KVM_REG_ARM_FW | ((r) & 0xffff))

#define KVM_REG_ARM_PSCI_VERSION	KVM_REG_ARM_FW_REG(0)



/* Device Control API: ARM VGIC */

#define KVM_DEV_ARM_VGIC_GRP_ADDR	0

#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS	1